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I have not abandoned this project, but have very limited time at the moment. Next on the list is to get the RTL8366SR switch going so the Ethernet port and WAN port will work. WiFi is not an issue. There has been some progress in regards to Linux support for RTL8366RB chip sets and I need to test if this code actually works on the Watchguard. Once the switch is working the remaining stuff should not be too hard to implement (WiFi, LED and flashing OpenWrt to NAND), but a proper implementation maybe still away a bit. |
Thank you for replying. At this point I was just wondering if I should scavenge the unit for parts and dispose of the unit or not. Seems the architecture of this unit may be one-off and may not be applicable to other devices and not too interesting to keep around? Or do you expect it perhaps one day be accepted for merging with the mainline kernel? |
I think the unit is quite nice specs wise (even today) and I would not dispose it. The only parts you could scavenge are the WiFi card and the Antennas. I am not sure this specific port will go mainline, but I am confident I can get a functional OpenWrt going sometime this year and maybe OpenWrt will keep the port in their branch if I and others are willing to look after it. As mentioned I am just very busy with other things at the moment and there have not been any other requests about this device. However, you can pick them up on ebay now quite cheap as the official EOL was two years ago so it may get some traction on OpenWrt once a port is complete. Its a nice unit with a somewhat popular ARM SoC (Intel Xscale based) that will remain in the kernel for some years to come. |
Hi . I bought an xt22 from the flea market. I'm thinking of buying open-wrt but. I was unable to create the image.i use ubuntu 20.04. i am getting this error:FATAL ERROR: Unable to parse input tree |
hi |
the zImage is in the openwrt build folder somewhere, its not in the same folder as the rootfs. Once the build finished, you still need to append the watchguard device tree dtb file to the zImage (using cat) as well before you can boot the zImage. |
I may need to try this for the first time. Seems the serial port connector supplies 3v3 which unfortunately I don't have any 3v3 rs232 transceivers for this at this time, so it may be a while before first boot occurs, not to mention not having a bona-fide wall wart for it! |
@boxer4 I can look up the make / model of the serial adapter I used. I got some really cheap USB TTL adapters as well, but never tried them on this board. I got the one in the picture as I intended to present the serial port through the housing at some stage, for ease of access. You need a 12v 2a, pretty standard power supply. |
Hey there! I also bought one from the flea market today and I tried to build my own image for OpenWRT with this but failed as this is my first time doing this so I'm probably doing something wrong. Thankfully the router has an rj45 console connection and I'm using some random USB->Serial and a hand-made DB9 to rt45 adapter, so I got serial access fairly easily. I did follow this wiki up to the If that's wrong, would it be a problem to write some guildes as to how to build the image with these changes? I saw that this was mentioned:
But I did get an syntex error during compilation, nor do I really know which settings to enable during compilation (the Y/n prompt).
Edit: I'd definitely be willing to write documentation on how to do this + eventually create a Dockerfile for container-based builds of this project. |
Hi. First you must create zimage and create boot image . Than write boot image to a usb stick. |
@zastrixarundell Hi, first of all thanks for your interest. This kernel is work in progress and only covers XTM 2 series 21/22/23 models and their Wireless version 21-W/22-W/23-W as they are all identical IXP-4xx based hardware. However, the RJ45 console port is only available on the 25/25-W and 26/26-W models. These use a different boot-loader (U-Boot) that is also password locked! I do not have any of these and the password is not known, hence this port does not cover this model, unfortunately. |
Thanks for the answer! I spent hours trying to hook up an internal UART port thinking that the rj45 is just doesn't allow to use the password (as I was not getting an error when I typed the one linked in this repo so I thought that it was just not allowed via the accessible port). In this scenario I'm probably going to keep it somewhere as a glorified switch, if I can even use it like one, but if in any case you want to update the scope of this project just tag me here. I have these two models: HW MODEL # XP2E62 |
@zastrixarundell If you want, can you share some photo of the mainboard to see the internal layout of these models as well as the boot prompt you get via the RJ45 port ? Just to complete the picture. Perhaps try some U-Boot commands to see if you can get the version and more details etc. I assume it should tell you if you enter the correct password and allow further commands. For the password prompt on Redboot you need to push CTRL+C at boot, not sure about U-Boot. |
Thanks for the answer @greguu. Here's the menu (yes I can CTRL+C and type in the password). After typing in the password from the repo it just ignores the input and I can use my arrow keys to continue booting.
Here is the entire boot sequence:
Here is the archived URL for the xtm2 model which I have. It has the images of the motherboard on both sides. It's 3am here so I'll send the images (and boot log) for the other machine tomorrow during the day. It has an rs232 connector which I can thankfully connect to. Also quick question: Which type of VPN services does this project support when it's being ran on the mechine? Does it support only OpenVPN or does it also support Wireguard VPN? |
@zastrixarundell Thanks for these details. Once you boot into the vendor system, you can logon usually using the default credentials. Once in, you can dump more info to a USB stick that you plugin, such as system details, kernel modules used etc, via various system specific commands. If you have a vendor logon to their support site, you can download a image file you can extract and inspect as well for kernel config etc. However, this is in the end only useful if there is a way to flash a custom U-Boot or get the U-Boot password, so you can boot your own kernel and rootfs. I did ask the vendor ages ago about their kernel source, but never heard back. I doubt they release the U-Boot password. The specs on these boxes are still reasonable and with a bit of effort run a recent linux kernel that will allow you OpenWrt etc and your choice of VPN. For the 21-W model, I managed to get most things working, just not the NAND and the Realtek switch yet. However, its time consuming work to keep up with mainline and re-build and test. I will continue with the IXP4xx based models eventually. |
Hi all, |
@corzani Hi, the XTM 800/1500 series should be x86_64 and have an unlocked bootloader. Also around are their predecessors, X750/1000/1250 series, based on X86_32. You can find some guides online on how to run alternative OS on these. This project just covers the XTM21/22/23 series |
Has anyone considered a different approach... simply adjusting the existing system to let you remove their custom stuff and manually set up whatever config you want through a shell? e.g. I see this in the boot... I've done something similar in the past on a netgear router - once inside, I found "busybox" with every tool I could want, plus google lead me to some other custom binaries that run on that device just fine. |
@readnotify I explored it, but as you say, its rather custom setup that Watchguard has on these, including an ancient 2.6 kernel and some licensing stuff. While its relatively easy to get the vendor rootfs out of the offical upgrade file, it would be a bit of messing around to get some static binaries injected that will run with this old kernel. IMHO, the best approach is still to complete the device-tree for this board and get the RTK switch going on 6.x kernel. Its actually not that much more work for someone familiar with the matter as just the NAND config in the .dts and the Realtek switch are missing. |
Hello friend,
I loaded the file openwrt-ixp4xx-generic-zImage via serial but it doesn't load. It stops at this point:
Any idea what I'm doing wrong? |
@ellisonmax Hello, it seems the kernel you are trying to boot does not have serial console output enabled. The last OpenWrt test build I did was using these sources https://github.com/greguu/openwrt |
@LeonG71 Thanks, I was following LinusW effort to revive ixp4xx support in OpenWrt. rootfs and kernel: https://github.com/greguu/openwrt/releases/tag/ixp4xx-v6.1 Hopefully I can get some of the outstanding issues resolved so Watchguard support is part of the ixp4xx revival merge into OpenWrt. |
8366SR datasheet http://realtek.info/pdf/rtl8366s_8366sr_datasheet_vpre-1.4_20071022.pdf , as used in XTM X21-W and the already supported 8366S datasheet... http://realtek.info/pdf/rtl8366_8369_datasheet_1-1.pdf Watchguard says "RTL8366 TMIIOneArm success!" OneARM an 8366 mode where the 8366 has one ethernet link to the xscale (rather than 2 that other modes use ?) and it will tell how to configure the cpu and 8366. xscale CPU used one ethernet to talk to realtek , and watchguard gets it turn into three by vlan tags ... vendor logs three Vlan TAGS on eth3,4,5 ... So there is 3 10/100 ports and 3 gigabit capable ... the board has 3 small transformers, and two larger ones. Not that we need to do the vlan thing, we could let it work as a switch .. RTC is s35390a data "0-0030" |
@LeonG71 Thanks for the details around the 8366SR, and the VLAN, I will look further into this. I suspected the WAN port to be a ixp4xx native ethernet as eth0, but you confirmed it. So eth1-5 are Realtek Switch ports via VLAN. Its confusing how these get split between NPE PHYs, I do no yet understand this part. Vendor log:
eth3 to eth5 also get Realtek tagged, the others do not:
Thanks for identifying the RTC, I will look into adding this to the device tree. The CH341 way of accessing the UART is interesting, can you share more details ? It got some of these, but used them only for BIOS flashing / backups. I assume you can use the pins for that. The WiFi card would possibly be the same for all the XTM21/22/23-W models and is supported as far as I can tell. Currently, the focus is on getting the NAND going, it is apparently using Chip Select 1 and uses gpio-control-nand, instead of gen-nand. I have updated https://github.com/greguu/linux_kernel_xtm2_richland with some details I identified so far. Identifying the GPIO PINs used to control the NAND is possibly whats missing atm. Once NAND is working, I need also to find another way of booting a kernel, as loading using ymodem is too slow and frustrating. The TFTP implementation on Watchguard Redboot appears to be broken or deliberately disabled. Flashing a vanilla Redboot is risky and I do not have spare devices to take the risk. If anyone has the time and guts to try this this would be great :) The switch implementation is the final part, I like to get the others sorted first to ease the work on the switch side. |
For the CH341A , I got the schematics and RS232 specific drivers from here https://tad-electronics.com/2019/03/10/ch341a-mini-programmer-schematic-and-drivers/ . Note this page discusses "CH341 powered by 5 volts always" boards.. You might have a board which has control over the CH341's TTL levels. The ZIF socket doesn't have RS232, so I used some old standard PC motherboard connectors (2 pin ..eg LED or momentary switch) to push onto the TX , RX at both ends. Earth is in ZIF , so I just used a wire from ZIF to a screw at the X21-W, Check your CH341 is for 5 volts TTL on its data lines (if the option exists to change it ) and set it to RS232 mode with the CH341A board's jumper on 2,3 instead of 1,2 ... and use the RS232 specific driver for the CH341 as per the link I supplied. Is this the correct command to get greg's latest code ? git clone https://github.com/greguu/openwrt -b ixp4xx-v6.1-watchguard ...Well I have booted with Greg's kernel and my own filesystem image, created on a USB flashdrive.. e2fs on it, and use it as a real hard drive... not a squashfs or anything like that. I can compile and use packages, and transfer them by using a second USB device ( plug in and unplug live ) |
@LeonG71 Good news! I need to update the .dts file in this repo, the current one is actually here in the OpenWrt repository:diff It has support for the 16MB NOR Flash, but not yet NAND and Switch. I recommend to build your own rootfs and kernel using OpenWrt, you can add the packages you want into the build process and boot from the rootfs via USB. Use this branch |
@LeonG71
The firmware files for the IXP4xx-eth are already build and included in the OpenWrt rootfs under /lib/firmware In regards to the RTL switch, I did try both, the "classic" PHY switch and the DSA implementation. It appears the kernel is moving to DSA so it maybe worth migrating 8366SR to DSA, based on the the current 8366S implementation. The Marvel switch was also enabled as CONFIG_MARVEL_PHY in the vendor kernel, but I could not see any kernel output on the vendor kernel on further details. Its possibly the missing bit to get ethernet ports 0-2 , eg the 10/100 ports, working and would explain the split of the ports between the two switches. I have not had time to play further with the switches or the NAND for that matter, but will look into it time permitting. Rebuilding the kernel is fast, but loading it for a test boot via ymodem is very slow. I was playing with the thought to get Redboot TFTP working, by flashing a new Redboot (vanilla), but worried it may brick the board. |
@LeonG71 Redboot does populate a FIS on the NOR FLASH if you run "fis init" but it will wipe the vendor partitions that are static. The device tree that I setup will use the FIS. You can actually put the kernel and/or rootfs into NOR FLASH already and boot from it. You could also boot the kernel from NAND, if you flash it from Redboot, but I do not see any value of it yet compared to USB boot. |
Note, its Vital to configure open-wrt gpio.c's as read only ( disable write8 and write16 in it) , so that a nearly compatible config doesn't trigger it to write bad block info just because of a failure of the ECC algorithm. dts for the nand .. how can we know what the watchguard expect ??? I guess only by testing , READONLY, on a good watchguard written NAND, ? and then on a nand written by openwrt and read by redboot ? openwrt (linux) should really use the new format nand raw in the dts .. while the code is there for old format, its a stupid idea to mix them. ... I think the new format routines make up a default if there is nothing, so the basically its not a good idea to try the old format without first disabling the new format ( by C code forcing it to use read "of" function labelled legacy . ) The nand-ecc strings used in drivers/mtd/nand/.c are the new ones, generally, and the strings used in drivers/mtd/nand/raw/.c are the old ones ( but for io_sync... ) and meant to be avoided. "maximize" isn't documented in /Documents/device-tree/bindings/... , so something like but the details of bch vs hamming, step size and strength, I do not yet know. I guess I can, as I can put debug prints in uboot , and try things, to get some idea of whats compatible.
two fixes ... openwrt was using bank width = 2 if its not in the DTS as bank width 1. its a fix because I thought bank-width defaulted to 1. like it does in uboot. maybe it went to 2 in openwrt because of some of the DTS entries. Then the cryptically documented io-sync-reg ... change it like this and the dts entry isnt going to do a thing.
|
@LeonG71 Thanks for this. I will give it a go. To clarify on the io-sync-reg fix, is this just for this particular NAND or generally a better way then specifying the addr in the dts ? Not related, but similar question, there is a fix for the EHCI to set the offset on ixp43x required, I just hardcoded it, should it be a variable out of dts ? I assume the offset is always the same for ixp43x and so far no other platform needed one ? |
Why do you ask about USB ? it works already.... the dts loads the dtsi files. which includes the io sync is a fix for Arm .. in fact for any Arm cpu ? I am reading people advising doing this for the later ARM, as bigger pipelines of modern ARM would have a higher cost for an "every time" fix.... Maybe the gpio driver should do the io_sync instead of leaving it to individual driver.... ? btw, I had tried building a small openwrt kernel to fit in the NOR... which could boot straight to usb ... there is zexec chain boot of linux kernels.. so the space we have is 500k there in nor right ? well the result I got was a 600K kernel ... damm it. maybe theres things locked in by openwrt which might actually be removable ...?? |
I see uboot 2013 has nand for spl, so its just a matter of getting kernel image in the right format for uboot to use .. no need for redboot compatibility hey
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lol. I see what is wrong with the original gpio.c in openwrt .... the code doesn't have any delays! The code just let the cpu rush straight through setting a GPIO signal, write a command, read the result, clear the GPIO signal.... the chip going "hey hang on , I missed the bit after "step 1: "... !" .. maybe it works on 10Mhz CISC or early Pi , something like that... just ndelay(1000) after anything which might need a delay... 1000 is a microsecond.. the spec says 20 ns.. but well, why rush,its, when its only a microsecond wasted. here..... in gpio.c...
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mtd_debug erase /dev/mtd4 So... the file I read back from NAND is fully perfect over 2 and a half meg of zImage... Uboot's default seems to be happy to read from the redboot written NAND data.., using |
And.... redboot can read it ... and use it ... nandtest -t 15 -p 0 -b 0x200000 -n 2900000 |
SYS-A is currently defined as reading 2 megabyte kernel ... |
yep, mostly the change to lzma compression, and some from omitting extra debugging helpers eg full symbols. ls -al zImage. |
@LeonG71 Thanks for you help with this. Good to see the NAND working. To understand better the proposed boot process, can we not use Redboot and fsinit the NOR to allow a larger size for a zImage? NOR should be 16MB total, enough to hold a kernel. This way we can fit the kernel fully in NOR and the rootfs just in NAND ? I understand some other OpenWrt platforms use a NOR-NAND layout. I have not much experience with NAND partitions, but can the SYSA and SYSB partitions not be changed to fit a larger kernel ? For NAND to work, is it just the .dts changes and some changes in the raw nand code as you showed ? I will put some patches together and test this weekend. |
I saw you defined it as 16 megabyte in dts. This came from trying to interpret info from Watchguard firmware ? Well thats the max size for ixp435 CS0's address space.
But the OS's only detect 1 megabyte working.. how can it say it s 16 megabytes but then say its 1 megabyte ?
I could read the chip id on mine,its an 8 megabit NOR. . well the logo is MX , the printed id line is 29LV800DCTTC-70G
So it is correct to say its one megabyte.
I saw Linux Nor code tests it for size and checks for alias addresses, due to the history of devices having variable size chips installed, with unreadable or problematic printing on the top, and problematic programmed in ID. I see our kernel complains about the chip a little, then gets on with testing what it has.
[ 24.492794] 50000000.flash: Found 1 x16 devices at 0x0 in 16-bit bank. Manufa
cturer ID 0x0000c2 Chip ID 0x0022da
[ 24.510689] 50000000.flash: Found an alias at 0x100000 for the chip at 0x0
[ 24.510769] 50000000.flash: Found an alias at 0x200000 for the chip at 0x0
See it tried the 2nd megabyte...is it addressable and working as unique ram ? nope, then tries 3megabyte, 4 megabyte, 5 megabyte, and only finds one megabyte working.
You see that people had trouble with unknown size of the NOR... printed on chip ID's being problematic, the uselessness of the programatic ID.... even chips which say they are 4 megabit but are actually 8 megabit, that sort of thing.
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@LeonG71 I assumed the NOR is 16MB in size based on some of the ixp4xx dts templates as its common the full CS0 space is used. But yes, its right there is nothing beyond on the first 1MB on the Watchguard. So its for Redboot and config only. I will update the .dts and documentation as well on this. |
From testing, Redboot works with OOB only (BBT off.) ECC defined as
I booted the 2 meg ( 1974648 bytes ) image and got a working system, first time ever for a totally hands free boot to a working openwrt ... BUT I am having trouble squashing everything into 2 meg... a single byte change in NOR ROM to change it to 4 meg, but ... is it checksummed ? :.. maybe I can an eeprom device to attach to the NOR., I booted SYS-B just now, as its defined as loading 4 meg, its more useful... I noticed the ath9k driver can take IRQ defined by Device tree. I didnt find where the code read it though... maybe the feature has gone missing. I was considering MSI .. looks like the driver supports it, even where the driver sets up a bunch of tests for the ath9k version in use and configures stuff based on that.. it configures all as capable of MSI ? So we have
But the 2 meg size limit kernel is good, its stable and running "make modules".just change the kernel compression to LZMA, it shaves it right down... |
Working gpio.c all that has to be fixed is here. Dont worry about putting the delays in nand_base.c save a few nanoseconds by precise calculations ????
#include <linux/kernel.h> static int packets=0, zeropackets=0; struct gpiomtd { void iowrite88_rep(void * addr, u8 * buf,int len, struct gpiomtd *gpiomtd ) { int i;
//pr_warn("write checksum %d \n",checksum ); static inline struct gpiomtd *gpio_nand_getpriv(struct mtd_info *mtd) #ifdef CONFIG_ARM
static int gpio_nand_exec_instr(struct nand_chip *chip,
} static int gpio_nand_exec_op(struct nand_chip *chip,
} static int gpio_nand_attach_chip(struct nand_chip *chip)
} static const struct nand_controller_ops gpio_nand_ops = { #ifdef CONFIG_OF static int gpio_nand_get_config_of(const struct device *dev,
} static struct resource *gpio_nand_get_io_sync_of(struct platform_device *pdev)
} static inline struct resource * static inline int gpio_nand_get_config(const struct device *dev,
} static inline struct resource *
} static int gpio_nand_remove(struct platform_device *pdev) pr_warn("gpio total packets %d zeropackets %d wpackets %d\n",packets,
} static int gpio_nand_probe(struct platform_device *pdev)
err_wp:
} static struct platform_driver gpio_nand_driver = { module_platform_driver(gpio_nand_driver); MODULE_LICENSE("GPL"); |
This is intended as the "all you need to fix" additional to the standard compile for an openwrt kernel, for the watchguard. a. install a dts file - its not right in the kernel package provided. ( eg GPIO definitions for the samsung flash nand previously here,, the nand partitions could do with an entry for SYS-B , since it can take a 4 meg kernel and be chosen by menu.... also the marvell - lan1 lan2 lan3 sections previously in this "issue" thread. the seiko rtc via I2c on two gpios previously from gregu, the PCI Irq for the wireless card , from me. and b.install drivers/mtd/nand/raw/gpio.c from previous post. c. install firmware images into roof fs and ensure the firmware functions are in kernel ( a Howard said he got it ETH firmware working to drive ethernet packets through the marvel ethernet chip . ) configure the kernel. 1a. The NOR flash driver is a bit hidden .. and confusing... it reads like its asking the same thing 3 times. Need to build it into the in the kernel ( seems to be broken for modules, like the MTD above it. ) 1b.install a default kernel configuration line into the kernel... "console=ttyS0,115200 root=/dev/sda1 rootdelay=12" 1c. Openwrt's "make menuconfig" doesn't turn on USB_EHCI_HCD_PLATFORM ,which we need on to use the USB.. Having used kernel_menuconfig, the openwrt version of the kernel config is left with some ill-defined debug definitions, that the default action of "make" detects and asks you about, before it starts compiling. Its of little consequence ( it means that "make &> errs " hangs for ever ,stuck waiting for an answer to a question you won't have been asked. ) You want the USB interface driver, the USB mass storage, and the SCSI generic hard drive drive in the kernel.. (usb mass storage emulates a scsi hard drive.)
My fix for this was to edit the drivers/mtd Makefile , and add that mtd_blkdev.o file to the "mtd-y = " line, and comment out the module line for it later ,that being the "obj-$(CONFIG_MTD_BLKDEVS" line. But if you select the Memory Technology Devices, CONFIG_MTD ..well first, it doesnt work, the top doesn't work as a module. seg faults, something messed uop. But You can set the RAW NAND GPIO to be a module and get nand.ko and gpio.ko .. ...if you do try the top end as a module, compiling it fails at first ,due to two errors. 2a There's a function missing an export , mtd blk dev_trans add function. Simply needs the EXPORT( ) in its implementation C file. 2b There's a variable ROOT_DEV undefined to the module ... not exported from its home in init/do_mounts.c . Its possible to fix by adding the EXPORT declaration to init/do_mounts.c , or , an "#ifndef MODULE " wrappper around its use in drivers/mtd/mtdcore.c ( so the module can't set ROOT_DEV .. so what hey ?) The above is my notes from a clean compile of the linux kernel and what it took to get it compiled for USB mass storage root fs, the NAND flash and the NOR flash working... |
btw, pci INTA is on GPIO pin 0 . there is a line in the watchguard firmware log saying saying the pci interrupt is being assigned to gpio 0. Buzzed it out with the multimeter, yep , GPIO 0 writes out to pin 20 on the PCI connector. So it ought accept from there too.... the gpio-ixp file tells us why it talks about Irq 6 and irq 23 even though we are using irq 0.. ???? I see, a gpio 0 interrupt means hardware interrupt 6 to linux.
But the log output Its applied the mapping twice !. its gone from 0 , to 6, to 23 .... 23 is the grandparent.. this is kaos, there are no grandparents in kaos !! It might be due to the ath9k driver ? , as this pops up when I modprobe ath9k ... So the documentation says So the mapping in that C file is right, it just shouldnt be applied twice. |
There is a set of patches freshly released that cleans up realtek SMI vs MDIO realtek drivers. But doesn't increase the number of chips supported. but still a good patch to include ? here |
@LeonG71 Thanks again, I will put together a patch for drivers/mtd/nand/raw/gpio.c and do some NAND testing this week. Do you have a gpio.c with comments on your patch ? It would help to understand what is being done. Then attach the file to the comment. |
@LeonG71 can you also attach the nand section of your .dts ? I tried with your gpio.c and still get errors. |
Thanks @LeonG71! However, I am still getting this error on boot:
Maybe gpio.c is not 100%? Can you attach the latest version ? |
I think that error is due to mtd being a module, and its broken.
I compiled mtd into kernel and had only gpio.ko ,nand.ko ....
Get Outlook for Android<https://aka.ms/AAb9ysg>
…________________________________
From: greguu ***@***.***>
Sent: Friday, January 12, 2024 7:08:04 PM
To: greguu/linux_kernel_xtm2_richland ***@***.***>
Cc: LeonG71 ***@***.***>; Mention ***@***.***>
Subject: Re: [greguu/linux_kernel_xtm2_richland] Information about this project (#1)
intel-ixp43x-watchguard-xtm21w.txt<https://github.com/greguu/linux_kernel_xtm2_richland/files/13885699/intel-ixp43x-watchguard-xtm21w.txt>
Thanks @LeonG71<https://github.com/LeonG71>!
However, I am still getting this error on boot:
[ 1.504477] IO was 0 [ 1.507031] IO now d08b4000 [ 1.510139] IO finally d08b4000 [ 1.513838] nand: device found, Manufacturer ID: 0xec, Chip ID: 0xda [ 1.520274] nand: Samsung NAND 256MiB 3,3V 8-bit [ 1.524912] nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64 [ 1.532507] ------------[ cut here ]------------ [ 1.537126] WARNING: CPU: 0 PID: 1 at drivers/mtd/nand/raw/nand_base.c:5718 nand_scan_with_ids+0x13f4/0x1838 [ 1.547015] Hamming ECC initialization failed! [ 1.551456] Modules linked in: [ 1.554516] CPU: 0 PID: 1 Comm: swapper Not tainted 6.1.52 #0 [ 1.560266] Hardware name: IXP4xx (Device Tree) [ 1.564799] unwind_backtrace from show_stack+0x10/0x14 [ 1.570069] show_stack from dump_stack_lvl+0x28/0x30 [ 1.575136] dump_stack_lvl from __warn+0x94/0xdc [ 1.579868] __warn from warn_slowpath_fmt+0x70/0x84 [ 1.584849] warn_slowpath_fmt from nand_scan_with_ids+0x13f4/0x1838 [ 1.591221] nand_scan_with_ids from gpio_nand_probe+0x2a4/0x34c [ 1.597253] gpio_nand_probe from platform_probe+0x44/0x84 [ 1.602765] platform_probe from really_probe+0xb4/0x2dc [ 1.608085] really_probe from driver_probe_device+0x34/0x124 [ 1.613840] driver_probe_device from __driver_attach+0x90/0x17c [ 1.619855] __driver_attach from bus_for_each_dev+0x64/0x90 [ 1.625550] bus_for_each_dev from bus_add_driver+0x154/0x1e8 [ 1.631312] bus_add_driver from driver_register+0x8c/0x124 [ 1.636895] driver_register from do_one_initcall+0x4c/0x274 [ 1.642563] do_one_initcall from kernel_init_freeable+0x164/0x1ec [ 1.648770] kernel_init_freeable from kernel_init+0x10/0x128 [ 1.654551] kernel_init from ret_from_fork+0x14/0x2c [ 1.659618] Exception stack(0xc0c25fb0 to 0xc0c25ff8) [ 1.664677] 5fa0: 00000000 00000000 00000000 00000000 [ 1.672865] 5fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 1.681047] 5fe0: 00000000 00000000 00000000 00000000 00000013 00000000 [ 1.687736] ---[ end trace 0000000000000000 ]--- [ 1.692383] gpio-nand: probe of 51000000.gpio-nand failed with error -524
Maybe gpio.c is not 100%? Can you attach the latest version ?
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@LeonG71 Did you build your kernel with OpenWrt or just from vanilla sources ? I use the OpenWrt SDK and have the following for MTD in .config-6.1
Can you attach your gpio.c or upload your full kernel source to github so we can verify ? I can not reproduce your NAND fix otherwise.. |
I use the 'github clone' directory directly..
make menuconfig
make kernel_menuconfig
make
To get a clean kernel source, and avoid the delay of building toolchains and everything just delete the kernel tree .... .then make will expand the linux kernel tar.gz , patch it and configure it . And build it.
I didnt build gpio and nand into kernel. I put mtd in kernel and Nand and gpio as module.
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Sent: Friday, January 19, 2024 5:40:21 PM
To: greguu/linux_kernel_xtm2_richland ***@***.***>
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@LeonG71<https://github.com/LeonG71> Did you build your kernel with OpenWrt or just from vanilla sources ?
I use the OpenWrt SDK and have the following for MTD in .config-6.1
CONFIG_MTD_CFI_ADV_OPTIONS=y
# CONFIG_MTD_CFI_GEOMETRY is not set
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_BCH=y
CONFIG_MTD_NAND_GPIO=y
CONFIG_MTD_OTP=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_IXP4XX=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_FIRMWARE_NAME="linux"
Can you attach your gpio.c or upload your full kernel source to github so we can verify ? I can not reproduce you NAND fix otherwise..
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And how about MTD_NAND_ECC_SW_HAMMING [=y] ... if you want to be able to write the nand so that redboot can read it. |
Here is gpio.c as a prestine file. and I booted the result and it works here is a link to tgz with the kernel and modules that work to write to nand. the dtb is appended to the kernel , and its expecting the root fs ext4 / on /dev/sda1 ... https://1drv.ms/u/s!AsTex5OoPMW8yXrtmrd_t-YPeKJA?e=5Iqnaa So it just occurred to me, if I have a working kernel in SYSB, I can just have a kernel to try in the filesystem, rather than mess with the working SYSB .. then "kexec -f zImage" , and bang, running the trial kernel |
@LeonG71 I will try this asap. Yes, kexec makes sense now as we have ethernet support. |
@LeonG71 Ok, I got it working now. The gpio.c did the trick with some messing around in the kernel config. Thanks. There is maybe a way to define custom NAND partitions and make redboot boot from one of these ? |
Well yes, you can define the partitions that work as SYSA's Kernel, SYS B kernel. But the watchguard redboot customisation can been seen in ascii in the rom image. they just use redboot commands, EG nandtest -t 15 ... To load from nand to Ram.. so the script for SysA loads 2 megabytes only, sysb loads 4 meg.
Unfortunately the script you can enable after control C only operates upon control C ( not instead of the Sys A , sys B,sys c menu .) But oh wlll it could be used as part of a backup kernel system.
I was thinking, sys A would only need some lines of machine code , like jump to the implemention sys b , or copy the sysb string to the correct address ,then restart interpteter on it... or uboot is an option in
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@LeonG71<https://github.com/LeonG71> Ok, I got it working now. The gpio.c did the trick with some messing around in the kernel config. Thanks.
I will add some patches to the repository this week after further testing.
There is maybe a way to define custom NAND partitions and make redboot boot from one of these ?
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Not dead, but limited time to work on this. Current status as below:
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Curious if this project is still being looked at? I am wondering if I should look into using my XTM-21W.
Not sure if this is useful information but I pulled the Atheros wifi card from it and found that it seems to work with the ath9k Linux driver in 4.4.163, which may make porting easier.
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