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x86jit: Fix some silly mistakes.
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unknownbrackets committed Aug 21, 2023
1 parent 4e3f386 commit a47b442
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Showing 2 changed files with 13 additions and 7 deletions.
5 changes: 4 additions & 1 deletion Core/MIPS/x86/X64IRAsm.cpp
Expand Up @@ -171,7 +171,10 @@ void X64JitBackend::GenerateFixedCode(MIPSState *mipsState) {
// Debug
if (enableDebug) {
#if PPSSPP_ARCH(AMD64)
ABI_CallFunctionAA(reinterpret_cast<void *>(&ShowPC), R(MEMBASEREG), R(JITBASEREG));
if (jo.reserveR15ForAsm)
ABI_CallFunctionAA(reinterpret_cast<void *>(&ShowPC), R(MEMBASEREG), R(JITBASEREG));
else
ABI_CallFunctionAC(reinterpret_cast<void *>(&ShowPC), R(MEMBASEREG), (u32)jitbase);
#else
ABI_CallFunctionCC(reinterpret_cast<void *>(&ShowPC), Menory::base, (u32)jitbase);
#endif
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15 changes: 9 additions & 6 deletions Core/MIPS/x86/X64IRRegCache.cpp
Expand Up @@ -58,17 +58,20 @@ const int *X64IRRegCache::GetAllocationOrder(MIPSLoc type, int &count, int &base
#else
RBP, R8, R9, R10, R11, R12, R13,
#endif
// Intentionally last.
R15,
#elif PPSSPP_ARCH(X86)
ESI, EDI, EDX, ECX, EBX,
#endif
// Intentionally last.
R15,
};

if (!jo_->reserveR15ForAsm)
#if !PPSSPP_ARCH(X86)
if (jo_->reserveR15ForAsm) {
count = ARRAY_SIZE(allocationOrder) - 1;
else
count = ARRAY_SIZE(allocationOrder);
return allocationOrder;
}
#endif
count = ARRAY_SIZE(allocationOrder);
return allocationOrder;
} else if (type == MIPSLoc::FREG) {
base = -NUM_X_REGS;
Expand Down Expand Up @@ -285,7 +288,7 @@ X64Reg X64IRRegCache::R(IRReg mipsReg) {
if (mr[mipsReg].loc == MIPSLoc::REG || mr[mipsReg].loc == MIPSLoc::REG_IMM) {
return FromNativeReg(mr[mipsReg].nReg);
} else {
ERROR_LOG_REPORT(JIT, "Reg %i not in riscv reg", mipsReg);
ERROR_LOG_REPORT(JIT, "Reg %i not in x64 reg", mipsReg);
return INVALID_REG; // BAAAD
}
}
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