14010 bhyve should handle SMI exit on AMD

Reviewed by: Toomas Soome <tsoome@me.com> Reviewed by: Robert Mustacchi <rm@fingolfin.org> Approved by: Dan McDonald <danmcd@joyent.com>
illumos · Sep 10, 2021 · 8269d05 · 8269d05
1 parent 418ddc2
commit 8269d05
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Showing 2 changed files with 11 additions and 2 deletions.
diff --git a/usr/src/uts/i86pc/io/vmm/amd/svm.c b/usr/src/uts/i86pc/io/vmm/amd/svm.c
@@ -1350,7 +1350,14 @@ svm_vmexit(struct svm_softc *svm_sc, int vcpu, struct vm_exit *vmexit)
 		vmm_stat_incr(svm_sc->vm, vcpu, VMEXIT_EXTINT, 1);
 		handled = 1;
 		break;
-	case VMCB_EXIT_NMI:	/* external NMI */
+	case VMCB_EXIT_NMI:
+	case VMCB_EXIT_SMI:
+	case VMCB_EXIT_INIT:
+		/*
+		 * For external NMI/SMI and physical INIT interrupts, simply
+		 * continue execution, as those host events will be handled by
+		 * the physical CPU.
+		 */
 		handled = 1;
 		break;
 	case 0x40 ... 0x5F:

diff --git a/usr/src/uts/i86pc/io/vmm/amd/vmcb.h b/usr/src/uts/i86pc/io/vmm/amd/vmcb.h
@@ -38,7 +38,7 @@
  * source.  A copy of the CDDL is also available via the Internet at
  * http://www.illumos.org/license/CDDL.
  *
- * Copyright 2020 Oxide Computer Company
+ * Copyright 2021 Oxide Computer Company
  */
 
 #ifndef _VMCB_H_
@@ -148,6 +148,8 @@ struct svm_softc;
 #define	VMCB_EXIT_MC			0x52
 #define	VMCB_EXIT_INTR			0x60
 #define	VMCB_EXIT_NMI			0x61
+#define	VMCB_EXIT_SMI			0x62
+#define	VMCB_EXIT_INIT			0x63
 #define	VMCB_EXIT_VINTR			0x64
 #define	VMCB_EXIT_CR0_SEL_WRITE		0x65
 #define	VMCB_EXIT_PUSHF			0x70