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firmware: smccc: Add support for erratum discovery API
It is not always possible for the OS to determine if a CPU is affected by a particular erratum. For example, it may depend on an integration choice the chip designer made, or whether firmware has enabled some particular feature. Add support for the SMCCC 'Errata Management Firmware Interface' that lets the OS query firmware for this information. Link: https://developer.arm.com/documentation/den0100/1-0/?lang=en Signed-off-by: James Morse <james.morse@arm.com>
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// SPDX-License-Identifier: GPL-2.0-only | ||
/* | ||
* Arm Errata Management firmware interface. | ||
* | ||
* This firmware interface advertises support for firmware mitigations for CPU | ||
* errata. It can also be used to discover erratum where the 'configurations | ||
* affected' depends on the integration. | ||
* | ||
* Copyright (C) 2022 ARM Limited | ||
*/ | ||
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#define pr_fmt(fmt) "arm_smccc_em: " fmt | ||
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#include <linux/arm_smccc_em.h> | ||
#include <linux/arm-smccc.h> | ||
#include <linux/errno.h> | ||
#include <linux/printk.h> | ||
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#include <asm/alternative.h> | ||
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#include <uapi/linux/psci.h> | ||
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static u32 supported; | ||
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int arm_smccc_em_cpu_features(u32 erratum_id) | ||
{ | ||
struct arm_smccc_res res; | ||
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if (!READ_ONCE(supported)) | ||
return -EOPNOTSUPP; | ||
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arm_smccc_1_1_invoke(ARM_SMCCC_EM_CPU_ERRATUM_FEATURES, erratum_id, 0, &res); | ||
switch (res.a0) { | ||
case SMCCC_RET_NOT_SUPPORTED: | ||
return -EOPNOTSUPP; | ||
case SMCCC_EM_RET_INVALID_PARAMTER: | ||
return -EINVAL; | ||
case SMCCC_EM_RET_UNKNOWN: | ||
return -ENOENT; | ||
case SMCCC_EM_RET_HIGHER_EL_MITIGATION: | ||
case SMCCC_EM_RET_NOT_AFFECTED: | ||
case SMCCC_EM_RET_AFFECTED: | ||
return res.a0; | ||
}; | ||
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return -EIO; | ||
} | ||
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int __init arm_smccc_em_init(void) | ||
{ | ||
u32 major_ver, minor_ver; | ||
struct arm_smccc_res res; | ||
enum arm_smccc_conduit conduit = arm_smccc_1_1_get_conduit(); | ||
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if (conduit == SMCCC_CONDUIT_NONE) | ||
return -EOPNOTSUPP; | ||
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arm_smccc_1_1_invoke(ARM_SMCCC_EM_VERSION, &res); | ||
if (res.a0 == SMCCC_RET_NOT_SUPPORTED) | ||
return -EOPNOTSUPP; | ||
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major_ver = PSCI_VERSION_MAJOR(res.a0); | ||
minor_ver = PSCI_VERSION_MINOR(res.a0); | ||
if (major_ver != 1) | ||
return -EIO; | ||
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arm_smccc_1_1_invoke(ARM_SMCCC_EM_FEATURES, | ||
ARM_SMCCC_EM_CPU_ERRATUM_FEATURES, &res); | ||
if (res.a0 == SMCCC_RET_NOT_SUPPORTED) | ||
return -EOPNOTSUPP; | ||
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pr_info("SMCCC Errata Management Interface v%d.%d\n", | ||
major_ver, minor_ver); | ||
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WRITE_ONCE(supported, 1); | ||
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return 0; | ||
} |
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/* SPDX-License-Identifier: GPL-2.0-only */ | ||
/* Copyright (c) 2023 ARM Limited */ | ||
#ifndef __LINUX_ARM_SMCCC_EM_H | ||
#define __LINUX_ARM_SMCCC_EM_H | ||
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#include <linux/types.h> | ||
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int arm_smccc_em_init(void); | ||
int arm_smccc_em_cpu_features(u32 erratum_id); | ||
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#endif /* __LINUX_ARM_SMCCC_EM_H */ |