Fixes for BDW device enqueue

- add DC Flush to PipeControl with CSStall - fix SLB SPACE_FOR_EACH_ENQUEUE size for gen8 Change-Id: Ida6ced371e86ff0f8c1b23f08e64fa73530e37b1
intel · May 30, 2018 · 9a7e57d · 9a7e57d
1 parent 1e045e3
commit 9a7e57d
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Showing 4 changed files with 12 additions and 1 deletion.
diff --git a/runtime/device_queue/device_queue_hw.h b/runtime/device_queue/device_queue_hw.h
@@ -91,6 +91,7 @@ class DeviceQueueHw : public DeviceQueue {
     void addPipeControlCmdWa(bool isNoopCmd = false);
     void initPipeControl(PIPE_CONTROL *pc);
     void buildSlbDummyCommands();
+    void addDcFlushToPipeControlWa(PIPE_CONTROL *pc);
 
     void addProfilingEndCmds(uint64_t timestampAddress);
     static size_t getProfilingEndCmdsSize();

diff --git a/runtime/device_queue/device_queue_hw.inl b/runtime/device_queue/device_queue_hw.inl
@@ -430,6 +430,8 @@ void DeviceQueueHw<GfxFamily>::addMediaStateClearCmds() {
     pipeControl->setGenericMediaStateClear(true);
     pipeControl->setCommandStreamerStallEnable(true);
 
+    addDcFlushToPipeControlWa(pipeControl);
+
     PreambleHelper<GfxFamily>::programVFEState(&slbCS, device->getHardwareInfo(), 0, 0);
 }
 
@@ -471,4 +473,7 @@ size_t DeviceQueueHw<GfxFamily>::getProfilingEndCmdsSize() {
     return size;
 }
 
+template <typename GfxFamily>
+void DeviceQueueHw<GfxFamily>::addDcFlushToPipeControlWa(PIPE_CONTROL *pc) {}
+
 } // namespace OCLRT
diff --git a/runtime/gen8/device_enqueue.h b/runtime/gen8/device_enqueue.h
@@ -44,7 +44,7 @@
 
 #ifdef WA_LRI_COMMANDS_EXIST_GEN8
 
-#define SECOND_LEVEL_BUFFER_SPACE_FOR_EACH_ENQUEUE_GEN8PLUS (OCLRT_SIZEOF_MEDIA_STATE_FLUSH + OCLRT_SIZEOF_MI_ATOMIC_CMD + OCLRT_SIZEOF_MEDIA_VFE_STATE_CMD + OCLRT_SIZEOF_MEDIA_INTERFACE_DESCRIPTOR_LOAD_DEVICE_CMD + OCLRT_LOAD_REGISTER_IMM_CMD_G8 + OCLRT_PIPE_CONTROL_CMD_DEVICE_CMD_G8 + OCLRT_GPGPU_WALKER_CMD_DEVICE_CMD_G8 + OCLRT_SIZEOF_MEDIA_STATE_FLUSH + OCLRT_PIPE_CONTROL_CMD_DEVICE_CMD_G8 + OCLRT_LOAD_REGISTER_IMM_CMD_G8 + CS_PREFETCH_SIZE)
+#define SECOND_LEVEL_BUFFER_SPACE_FOR_EACH_ENQUEUE_GEN8PLUS (OCLRT_SIZEOF_MEDIA_STATE_FLUSH + OCLRT_SIZEOF_MI_ATOMIC_CMD + OCLRT_SIZEOF_MEDIA_INTERFACE_DESCRIPTOR_LOAD_DEVICE_CMD + OCLRT_LOAD_REGISTER_IMM_CMD_G8 + OCLRT_PIPE_CONTROL_CMD_DEVICE_CMD_G8 + OCLRT_GPGPU_WALKER_CMD_DEVICE_CMD_G8 + OCLRT_SIZEOF_MEDIA_STATE_FLUSH + OCLRT_PIPE_CONTROL_CMD_DEVICE_CMD_G8 + OCLRT_LOAD_REGISTER_IMM_CMD_G8 + CS_PREFETCH_SIZE)
 
 #else
 

diff --git a/runtime/gen8/device_queue_gen8.cpp b/runtime/gen8/device_queue_gen8.cpp
@@ -81,5 +81,10 @@ void DeviceQueueHw<Family>::addProfilingEndCmds(uint64_t timestampAddress) {
     pPipeControlCmd->setAddress(timestampAddress & (0xffffffff));
 }
 
+template <>
+void DeviceQueueHw<Family>::addDcFlushToPipeControlWa(PIPE_CONTROL *pc) {
+    pc->setDcFlushEnable(true);
+}
+
 template class DeviceQueueHw<Family>;
 } // namespace OCLRT