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igc: Avoid TX Hangs because long cycles
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Avoid possible TX Hangs caused by using long Qbv cycles. In some
cases, using long cycles (more than 1 second) can cause transmissions
to be blocked for that time. As the TX Hang timeout is close to 1
second, we may need to reduce the cycle time to something more
reasonable: the value chosen is 1ms.

Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Signed-off-by: Malli C <mallikarjuna.chilakala@intel.com>
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mrchilak authored and zhoufuro committed Feb 23, 2021
1 parent 1b1b63b commit 63d162a
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Showing 2 changed files with 5 additions and 5 deletions.
4 changes: 2 additions & 2 deletions drivers/net/ethernet/intel/igc/igc_main.c
Original file line number Diff line number Diff line change
Expand Up @@ -4721,12 +4721,12 @@ static int igc_save_launchtime_params(struct igc_adapter *adapter, int queue,
if (adapter->base_time)
return 0;

adapter->cycle_time = NSEC_PER_SEC;
adapter->cycle_time = NSEC_PER_MSEC;

for (i = 0; i < adapter->num_tx_queues; i++) {
ring = adapter->tx_ring[i];
ring->start_time = 0;
ring->end_time = NSEC_PER_SEC;
ring->end_time = NSEC_PER_MSEC;
}

return 0;
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6 changes: 3 additions & 3 deletions drivers/net/ethernet/intel/igc/igc_tsn.c
Original file line number Diff line number Diff line change
Expand Up @@ -54,11 +54,11 @@ static int igc_tsn_disable_offload(struct igc_adapter *adapter)

wr32(IGC_TXQCTL(i), 0);
wr32(IGC_STQT(i), 0);
wr32(IGC_ENDQT(i), NSEC_PER_SEC);
wr32(IGC_ENDQT(i), NSEC_PER_MSEC);
}

wr32(IGC_QBVCYCLET_S, NSEC_PER_SEC);
wr32(IGC_QBVCYCLET, NSEC_PER_SEC);
wr32(IGC_QBVCYCLET_S, NSEC_PER_MSEC);
wr32(IGC_QBVCYCLET, NSEC_PER_MSEC);

adapter->flags &= ~IGC_FLAG_TSN_QBV_ENABLED;

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