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Collection of digital hardware modules & projects (benchmarks)

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hdl-benchmarks

Digital hardware modules & projects (i.e. benchmarks) are used for EDA tools evaluation.

Structure

The project has the following catalog structure:

  • bash - Bash scripts directory
  • hdl - HDL benchmarks directory
    • epfl - EPFL combinational benchmark suite
    • iccad-2015 - ICCAD-2015 CAD Contest benchmark suite
    • iscas85 - ISCAS'85 benchmarks
    • iscas89 - ISCAS'89 benchmarks
    • iwls05 - IWLS'2005 benchmarks
    • lgsynth91 - LGSynth'1991 benchmarks
    • mcnc - MCNC'91 benchmarks
    • quip - Quartus University Interface Program (QUIP) benchmarks
    • texas97 - Texas-97 benchmarks
    • vcegar - VCEGAR benchmarks
    • verilog2smv - Verilog2SMV benchmarks

Benchmarks

The following public benchmarks are updated (several bugs and formatting issues are fixed) and are used in this project:

Several benchmarks are included as submodules:

  • EPFL benchmarks were developed at École Polytechnique Fédérale de Lausanne and consist of 23 natively combinational circuits designed to challenge modern logic optimization tools. The benchmark suite is divided into arithmetic, random/control and MtM (More than ten Milion gates) parts. Each circuit is distributed in Verilog, VHDL, BLIF and AIGER formats.