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i#3044 AArch64 SVE codec: Add memory tagged load/stores (DynamoRIO#6215)
This patch adds the appropriate macros, tests and codec entries to decode and encode the following instructions: ``` LDG <Xt>, [<Xn|SP>, #<simm>] ST2G <Xt>, [<Xn|SP>], #<simm> ST2G <Xt>, [<Xn|SP>, #<simm>]! ST2G <Xt>, [<Xn|SP>, #<simm>] STG <Xt>, [<Xn|SP>], #<simm> STG <Xt>, [<Xn|SP>, #<simm>]! STG <Xt>, [<Xn|SP>, #<simm>] STZ2G <Xt>, [<Xn|SP>], #<simm> STZ2G <Xt>, [<Xn|SP>, #<simm>]! STZ2G <Xt>, [<Xn|SP>, #<simm>] STZG <Xt>, [<Xn|SP>], #<simm> STZG <Xt>, [<Xn|SP>, #<simm>]! STZG <Xt>, [<Xn|SP>, #<simm>] STGP <Xt>, <Xt2>, [<Xn|SP>], #<simm> STGP <Xt>, <Xt2>, [<Xn|SP>, #<simm>]! STGP <Xt>, <Xt2>, [<Xn|SP>, #<simm>] ``` Issue DynamoRIO#3044 Co-authored-by: Joshua Warburton <joshua.warburton@arm.com>
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