SimMIPS is an embedded system running on FPGA. It consists of CPU, peripherals, diverse interfaces and corresponding C-based application codes.
The CPU is a simplified version of MIPS32 4Kc processor and is implemented in Verilog. As a subset of MIPS32 Release 1, the intruction set of our CPU covers the commonly used assemble instructions generated by GNU GCC. Features of CPU as follows:
- 32bit RISC architecture
- 5 stage pipeline
- compatable with MIPS32 Release 1 instruction set
- dynamic branch predictor
- MMU with ITLB and DTLB
- Bus Interface Unit(BIU) with Wishbone bus protocol
- Hardware Multiply-Divide Unit(MDU)
- Almost fully functional System Control Coprocessor(CP0)
The picture above is the CPU architecture.
As for peripherals, we provide UART, SPI Master Controller, Timer, RTC(real time controller), GPIO(General Purpose IO), PIC(Programmable Interrupt Controller) and VGA Display Controller. The storage system is composed of SDRAM, SRAM, FPGA BlockRAM and SD card connected via SPI bus.
Apart from hardware implementation on FPGA, there is still a long way to go before launching Hello World program. We develop boot software system to assist developers. You can run BootClient software on PC to transmit an elf-format executable program over serial line which is connected between PC and FPGA board. Then the BootRom in FPGA will store the program in memory and execute it. In another way, you could store the executable program in SD card before plugged in and choose Boot from SD card when power up the board.
Our project only supports Altera DE2-70 now. In the future we will add Nexys 4. It would be better if you have either one of these two boards. Other boards are OK and you may need to do port work yourself. Please refer to SimMIPS wiki when you encounter problems.
For more details, welcome to SimMIPS wiki