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Merge a477f17 into e5b8196
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jameshegarty committed Oct 29, 2018
2 parents e5b8196 + a477f17 commit e255bcc
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Showing 14 changed files with 374 additions and 25 deletions.
48 changes: 47 additions & 1 deletion examples/examplescommon.lua
Expand Up @@ -374,6 +374,28 @@ C.removeMSBs = memoize(function(A,bits)
return mod
end)

-----------------------------
C.removeLSBs = memoize(function(A,bits)
err( types.isType(A),"C.removeLSBs: type should be rigel type")
err( type(bits)=="number","C.removeLSBs: bits should be number or value")

local otype
if A:isUint() then
J.err(A.precision>bits,"removeLSBs: can't remove all the bits! attempting to remove "..bits.." bits from "..tostring(A))
otype = types.uint(A.precision-bits)
elseif A:isInt() then
J.err(A.precision>bits,"removeLSBs: can't remove all the bits! attempting to remove "..bits.." bits from "..tostring(A))
otype = types.int(A.precision-bits)
assert(false) -- NYI
else
J.err( A:isUint() or A:isInt(), "generators.removeLSBs: type should be int or uint, but is: "..tostring(A) )
end

local mod = RM.lift(J.sanitize("generators_removeLSBs_"..tostring(bits).."_"..tostring(A)), A,nil,nil,
function(inp) return S.cast(S.rshift(inp,S.constant(bits,A)),otype) end)
return mod
end)

-----------------------------
C.select = memoize(function(ty)
err(types.isType(ty), "C.select error: input must be type")
Expand Down Expand Up @@ -1003,7 +1025,7 @@ C.fifo = memoize(function(ty,size,nostall,csimOnly,X)
local regs = {R.instantiateRegistered("f1",RM.fifo(ty,size,nostall,nil,nil,nil,csimOnly))}
local st = R.applyMethod("s1",regs[1],"store",inp)
local ld = R.applyMethod("l1",regs[1],"load")
return RM.lambda("C_FIFO_"..tostring(ty).."_size"..tostring(size), inp, R.statements{ld,st}, regs, "C.fifo", {size=size} )
return RM.lambda("C_FIFO_"..tostring(ty).."_size"..tostring(size).."_nostall"..tostring(nostall), inp, R.statements{ld,st}, regs, "C.fifo", {size=size} )
end)

-------------
Expand Down Expand Up @@ -1078,6 +1100,7 @@ C.downsampleSeq = memoize(function( A, W, H, T, scaleX, scaleY, framed, X )
err( type(W)=="number", "C.downsampleSeq: W must be number")
err( type(H)=="number", "C.downsampleSeq: H must be number")
err( type(T)=="number", "C.downsampleSeq: T must be number")
err( T>0, "C.downsampleSeq: T must be >0")
err( type(scaleX)=="number", "C.downsampleSeq: scaleX must be number")
err( type(scaleY)=="number", "C.downsampleSeq: scaleY must be number")
err( scaleX>=1, "C.downsampleSeq: scaleX must be >=1")
Expand Down Expand Up @@ -1818,4 +1841,27 @@ C.AXIReadPar = memoize(
return res
end)

-- collect the number of tokens seen, and write it to a global
C.tokenCounterReg = memoize(
function( A, regGlobal, N)
J.err( types.isType(A),"tokenCounterReg: a must be type" )
J.err( A:is("Handshake"),"tokenCounterReg: input should be handshaked, but is: "..tostring(A))
J.err( N==nil or type(N)=="number","tokenCounterReg: N must be number" )

if N==nil then
N = math.pow(2,32)-1
end

local G = require "generators"

return G.Module{A,
function(inp)
local inpb = G.FanOut{2}(inp)
local ct = G.HS{C.valueToTrigger(A.params.A)}(inpb[1])
local cnt = G.HS{RM.counter(types.uint(32),N)}(ct)
cnt = G.HS{G.Add{1}}(cnt)
return R.statements{inpb[0],R.writeGlobal("wg",regGlobal,cnt)}
end}
end)

return C
Binary file added examples/gold/soc_tokencounter.bmp
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1 change: 1 addition & 0 deletions examples/gold/soc_tokencounter.regout.lua
@@ -0,0 +1 @@
return {startCnt=16384,endCnt=4096}
1 change: 1 addition & 0 deletions examples/gold/soc_tokencounter.terra.cycles.txt
@@ -0,0 +1 @@
8074
10 changes: 9 additions & 1 deletion examples/makefile
@@ -1,7 +1,7 @@
BUILDDIR ?= out

# soc_flipWrite.lua
SRCS_SOC = soc_simple.lua soc_2in.lua soc_convgen.lua soc_convgenTaps.lua soc_flip.lua soc_15x15.lua soc_15x15x15.lua soc_flipWrite.lua soc_regin.lua soc_regout.lua soc_convtest.lua soc_read.lua soc_redu1024.lua soc_redu2048.lua soc_redu4096.lua soc_redu8192.lua soc_redu16384.lua soc_redu32768.lua soc_sort.lua soc_filterseq.lua soc_filterseq8.lua soc_unaligned.lua soc_underflow.lua soc_parread.lua
SRCS_SOC = soc_simple.lua soc_2in.lua soc_convgen.lua soc_convgenTaps.lua soc_flip.lua soc_15x15.lua soc_15x15x15.lua soc_flipWrite.lua soc_regin.lua soc_regout.lua soc_convtest.lua soc_read.lua soc_redu1024.lua soc_redu2048.lua soc_redu4096.lua soc_redu8192.lua soc_redu16384.lua soc_redu32768.lua soc_sort.lua soc_filterseq.lua soc_filterseq8.lua soc_unaligned.lua soc_underflow.lua soc_parread.lua soc_tokencounter.lua

VERILATOR_SOC = $(patsubst %.lua,$(BUILDDIR)/%.verilatorSOC.bit,$(SRCS_SOC))
VERILATOR_SOC += $(patsubst %.lua,$(BUILDDIR)/%.verilatorSOC.raw,$(SRCS_SOC))
Expand All @@ -11,6 +11,12 @@ VERILATOR_SOC += $(patsubst %.lua,$(BUILDDIR)/%.verilatorSOC.regcorrect.txt,$(SR

ZU9VIVADOSOCBITS = $(patsubst %.lua,$(BUILDDIR)/%.zu9vivadoSOC.bit,$(SRCS_SOC))

ZU9VIVADOSOC = $(ZU9VIVADOSOCBITS)
ZU9VIVADOSOC += $(patsubst %.lua,$(BUILDDIR)/%.zu9vivadoSOC.raw,$(SRCS_SOC))
ZU9VIVADOSOC += $(patsubst %.lua,$(BUILDDIR)/%.zu9vivadoSOC.bmp,$(SRCS_SOC))
ZU9VIVADOSOC += $(patsubst %.lua,$(BUILDDIR)/%.zu9vivadoSOC.correct.txt,$(SRCS_SOC))
ZU9VIVADOSOC += $(patsubst %.lua,$(BUILDDIR)/%.zu9vivadoSOC.regcorrect.txt,$(SRCS_SOC))

SRCS = $(wildcard *.lua)
SRCS := $(filter-out harness.lua examplescommon.lua pyramid_core.lua harris_core.lua sift_core.lua sift_core_hw.lua campipe_core.lua descriptor_core.lua stereo_core.lua stereo_tr_core.lua lk_core.lua lk_tr_core.lua $(SRCS_SOC) harnessSOC.lua,$(SRCS))
METADATA = $(patsubst %.lua,$(BUILDDIR)/%.metadata.lua,$(SRCS))
Expand Down Expand Up @@ -261,6 +267,8 @@ zu9vivadobits: $(ZU9VIVADOBITS)

zu9vivadoSOCbits: $(ZU9VIVADOSOCBITS)

zu9vivadoSOC: $(ZU9VIVADOSOC)

axiverilog: $(AXIVERILOG)
touch $(BUILDDIR)/axiverilog_done.txt

Expand Down
24 changes: 24 additions & 0 deletions examples/soc_tokencounter.lua
@@ -0,0 +1,24 @@
local R = require "rigel"
local SOC = require "soc"
local C = require "examplescommon"
local harness = require "harnessSOC"
local G = require "generators"
local RS = require "rigelSimple"
local types = require "types"
local SDF = require "sdf"
types.export()

local Regs = SOC.axiRegs{startCnt={u32,0,"out"},endCnt={u32,0,"out"}}
regs = Regs:instantiate(SDF{1,8192})

local RegInOut = G.Module{
function(i)
local o = G.AXIReadBurstSeq{"frame_128.raw",{128,64},u(8),1}(i)
o = C.tokenCounterReg(o.type,Regs.startCnt,128*64*2048)(o)
o = G.HS{C.downsampleSeq( u8, 128, 64, 1, 2, 2)}(o)
o = C.tokenCounterReg(o.type,Regs.endCnt,128*64*2048)(o)
print("OT",o.type)
return G.AXIWriteBurstSeq{"out/soc_tokencounter",{64,32},1}(o)
end}

harness{regs.start,RegInOut,regs.done}
Binary file modified platform/zu9vivadoSOC/processimage_mpsoc_SOC
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44 changes: 40 additions & 4 deletions platform/zu9vivadoSOC/processimage_mpsoc_SOC.c
Expand Up @@ -182,19 +182,23 @@ int setRegisters(int curArg, char *argv[], void* ptr, unsigned int GPIO_BASE){
fflush(stdout);

curArg++; // for "--registers"
while(strcmp(argv[curArg],"--outputs")!=0){
while(strcmp(argv[curArg],"--registersOut")!=0){
printf("PARSE Reg %s %s\n",argv[curArg],argv[curArg+1]);
fflush(stdout);

unsigned int addr = strtol(argv[curArg],NULL,16);
unsigned int dat = strtol(argv[curArg+1],NULL,16);
int bytes = strlen(argv[curArg+1])/2;
printf("Set Register %x withNBytes %d, GPIO_BASE %x\n",addr,bytes,GPIO_BASE);
printf("Set Register %x withNBytes %d to value 0x%s/%d, GPIO_BASE %x\n",addr,bytes,argv[curArg+1],dat,GPIO_BASE);
fflush(stdout);

//unsigned int* data = (unsigned int*)argv[curArg+1];
char tmp[9]="";

for(int i=0; i<bytes/4; i++){
unsigned int num32bitchunks = bytes/4;
if(num32bitchunks<=0){num32bitchunks=1;}

for(int i=0; i<num32bitchunks; i++){
for(int j=0; j<8; j++){
tmp[j] = argv[curArg+1][i*8+j];
}
Expand All @@ -210,6 +214,9 @@ int setRegisters(int curArg, char *argv[], void* ptr, unsigned int GPIO_BASE){
fflush(stdout);

*(unsigned int*)(ptr+offset) = data;

unsigned int regDat = *(unsigned int*)(ptr+offset);
printf("Readback Reg %d\n",regDat);
//setReg( top, verbose, addr+i*4, data);
}

Expand All @@ -219,6 +226,34 @@ int setRegisters(int curArg, char *argv[], void* ptr, unsigned int GPIO_BASE){
return curArg;
}

int getRegisters(int curArg, char *argv[], void* ptr, unsigned int GPIO_BASE ){
curArg++; // for '--registersOut'

FILE* regFile = fopen("regout.lua","w");
fprintf(regFile,"return {");

bool first = true;
while(strcmp(argv[curArg],"--outputs")!=0){
unsigned int addr = strtol(argv[curArg+1],NULL,16);


unsigned int offsetBytes = addr-GPIO_BASE;
unsigned int regOut = *(unsigned int*)(ptr+offsetBytes);

printf("Read Reg %s (addr:%x) value:%d\n",argv[curArg],addr,regOut);

if(!first){fprintf(regFile,",");}
first=false;
fprintf(regFile,"%s=%d",argv[curArg],regOut);
curArg+=2;
}

fprintf(regFile,"}");
fclose(regFile);

return curArg;
}

int writeOutputs(int curArg, int argc, char *argv[], void* ptr){
printf("Write Outputs\n");
fflush(stdout);
Expand Down Expand Up @@ -380,7 +415,8 @@ int main(int argc, char *argv[]) {
printf("Done after %f seconds, %f cycles (@ %f MHZ)\n", len, (MHZ*HZ)*len,MHZ);
}
}


curArg = getRegisters( curArg, argv, gpioptr, gpio_addr );
writeOutputs(curArg,argc,argv,ptr);

printf("conf: start: %d, done: %d\n", conf->start, conf->done);
Expand Down
8 changes: 5 additions & 3 deletions platform/zu9vivadoSOC/run
Expand Up @@ -10,7 +10,7 @@ BITFILE=$1
BITFILE_BASE=$(basename $1)
METAFILE=$2
OUTFILE=$3
#OUTPATH=$4
OUTPATH=$4

while [[ -z `ip -6 neigh show | grep $ZYNQ_ETH | cut -d " " -f1` ]]
do
Expand All @@ -32,6 +32,7 @@ MEMEND=$($LUA $DIR/../../misc/extractMetadata.lua $METAFILE memoryEnd)
INPUTS=$($LUA $DIR/../../misc/extractMetadata.lua $METAFILE __INPUTS_ZYNQ)
OUTPUTS=$($LUA $DIR/../../misc/extractMetadata.lua $METAFILE __OUTPUTS_ZYNQ)
REGISTERS=$($LUA $DIR/../../misc/extractMetadata.lua $METAFILE __REGISTERS)
REGISTERSOUT=$($LUA $DIR/../../misc/extractMetadata.lua $METAFILE __REGISTERSOUT)

INPUT_FILES_ON_HOST=$($LUA $DIR/../../misc/extractMetadata.lua $METAFILE __INPUT_HOST_FILES)
INPUT_FILES_ON_DEVICE=$($LUA $DIR/../../misc/extractMetadata.lua $METAFILE __INPUT_DEVICE_FILES)
Expand All @@ -52,9 +53,10 @@ SSHOPT="-o UserKnownHostsFile=/dev/null -o StrictHostKeyChecking=no -6"
sshpass -p 'root' scp $SSHOPT $DIR/processimage_mpsoc_SOC $BITFILE $INPUT_FILES_ON_HOST root@\[$ZYNQ_ADDR\]:$ZYNQ_WRITE_PATH
sshpass -p 'root' ssh $SSHOPT root@$ZYNQ_ADDR "mv $ZYNQ_WRITE_PATH/$BITFILE_BASE $ZYNQ_BIN_FILE_PATH"
sshpass -p 'root' ssh $SSHOPT root@$ZYNQ_ADDR "echo $BITFILE_BASE > $ZYNQ_FIRMWARE_PATH"
sshpass -p 'root' ssh $SSHOPT root@$ZYNQ_ADDR "$ZYNQ_WRITE_PATH/processimage_mpsoc_SOC 0xA0000000 $MEMSTART $MEMEND --inputs $INPUTS --registers $REGISTERS --outputs $OUTPUTS"
sshpass -p 'root' ssh $SSHOPT root@$ZYNQ_ADDR "$ZYNQ_WRITE_PATH/processimage_mpsoc_SOC 0xA0000000 $MEMSTART $MEMEND --inputs $INPUTS --registers $REGISTERS --registersOut $REGISTERSOUT --outputs $OUTPUTS"
sshpass -p 'root' scp $SSHOPT root@\[$ZYNQ_ADDR\]:$ZYNQ_WRITE_PATH/out.raw $OUTFILE
sshpass -p 'root' ssh $SSHOPT root@$ZYNQ_ADDR "rm $ZYNQ_WRITE_PATH/processimage_mpsoc_SOC $INPUT_FILES_ON_DEVICE $ZYNQ_WRITE_PATH/out.raw $ZYNQ_BIN_FILE_PATH/$BITFILE_BASE"
sshpass -p 'root' scp $SSHOPT root@\[$ZYNQ_ADDR\]:$ZYNQ_WRITE_PATH/regout.lua $(echo $OUTPATH)zu9vivadoSOC.regout.lua
sshpass -p 'root' ssh $SSHOPT root@$ZYNQ_ADDR "rm $ZYNQ_WRITE_PATH/processimage_mpsoc_SOC $INPUT_FILES_ON_DEVICE $ZYNQ_WRITE_PATH/out.raw $ZYNQ_WRITE_PATH/regout.lua $ZYNQ_BIN_FILE_PATH/$BITFILE_BASE"

#rm -f /tmp/zynq10lock
# $(TERRA) ../misc/extractCycles.t out/$*.axi.raw > out/$*.axi.cycles.txt
Expand Down
18 changes: 12 additions & 6 deletions src/fpgamodules.lua
Expand Up @@ -175,20 +175,21 @@ return sliceRamCache[bits]
return ram
end

modules.fifo = memoize(function(ty,items,verbose)
modules.fifo = memoize(function(ty,items,verbose,nostall)
err(types.isType(ty),"fifo type must be type")
err(type(items)=="number","fifo items must be number")
err(type(verbose)=="boolean","fifo verbose must be bool")
err( items>1,"fifo: items must be >1")

local fifo = Ssugar.moduleConstructor( J.sanitize("fifo_"..tostring(ty).."_"..items) )
local fifo = Ssugar.moduleConstructor( J.sanitize("fifo_"..tostring(ty).."_"..items.."_nostall"..tostring(nostall)) )
-- writeAddr, readAddr hold the address we will read/write from NEXT time we do a read/write
local addrBits = (math.ceil(math.log(items)/math.log(2)))+1 -- the +1 is so that we can disambiguate wraparoudn
local writeAddr = fifo:add( systolic.module.regBy( types.uint(addrBits), modules.incIfWrap(types.uint(addrBits),items-1), true,nil,0 ):instantiate("writeAddr"))
local readAddr = fifo:add( systolic.module.regBy( types.uint(addrBits), modules.incIfWrap(types.uint(addrBits),items-1), true,nil,0 ):instantiate("readAddr"))
local bits = ty:verilogBits()
local bytes = bits/8

bytes = math.ceil(bytes) -- bits may not be byte aligned

local ram, rams
if items <= 128 and J.isPowerOf2(bits) then
ram = fifo:add( sliceRamGen(bits):instantiate("ram") )
Expand Down Expand Up @@ -225,7 +226,7 @@ modules.fifo = memoize(function(ty,items,verbose)
local pushCE = S.CE("CE_push")
local pushBack = fifo:addFunction( Ssugar.lambdaConstructor("pushBack",ty,"pushBack_input" ) )
pushBack:setCE(pushCE)
local pushBackAssert = fifo:add( systolic.module.assert( "attempting to push to a full fifo", true ):instantiate("pushBackAssert") )
local pushBackAssert = fifo:add( systolic.module.assert( "attempting to push to a full fifo", true, nostall~=true ):instantiate("pushBackAssert") )
local hasSpace = S.lt( fsize, S.constant(items-2,types.uint(addrBits)) ):disablePipelining() -- note that this is different than ready
pushBack:addPipeline( pushBackAssert:process( hasSpace ) )
pushBack:addPipeline( writeAddr:setBy(systolic.constant(true, types.bool()) ) )
Expand All @@ -237,7 +238,9 @@ modules.fifo = memoize(function(ty,items,verbose)
pushBack:addPipeline( rams[b]:write( S.tuple{ S.cast(writeAddr:get(),types.uint(7)), S.bitSlice(pushBack:getInput(),b-1,b-1)} ) )
end
else
pushBack:addPipeline( ram:writeAndReturnOriginal( S.tuple{ S.cast(writeAddr:get(),types.uint(addrBits-1)), S.cast(pushBack:getInput(),types.bits(bits))} ) )
local tinp = S.cast(pushBack:getInput(),types.bits(bits))
tinp = S.cast(tinp,types.bits(bytes*8))
pushBack:addPipeline( ram:writeAndReturnOriginal( S.tuple{ S.cast(writeAddr:get(),types.uint(addrBits-1)), tinp} ) )
end

-- pushBackReset
Expand Down Expand Up @@ -267,7 +270,10 @@ modules.fifo = memoize(function(ty,items,verbose)
popOutput = systolic.cast( systolic.tuple(bitfield), ty)
popFront:setOutput( popOutput, "popFront" )
else
popOutput = S.cast(ram:read(S.cast(readAddr:get(),types.uint(addrBits-1))),ty)
popOutput = S.cast(ram:read(S.cast(readAddr:get(),types.uint(addrBits-1))),types.uint(bytes*8))
popOutput = S.cast(popOutput,types.uint(bits))
popOutput = S.cast(popOutput,types.bits(bits))
popOutput = S.cast(popOutput,ty)
popFront:setOutput( popOutput, "popFront" )
end

Expand Down
7 changes: 4 additions & 3 deletions src/generators.lua
Expand Up @@ -49,6 +49,7 @@ generators.PartitionBits = R.newGenerator("generators","PartitionBits",{"type","
generators.Rshift = R.newGenerator("generators","Rshift",{"type","rate"},{"number"}, function(args) return C.rshift(args.type,args.number) end)
generators.AddMSBs = R.newGenerator("generators","AddMSBs",{"type","rate"},{"number"}, function(args) return C.addMSBs(args.type,args.number) end)
generators.RemoveMSBs = R.newGenerator("generators","RemoveMSBs",{"type","rate"},{"number"}, function(args) return C.removeMSBs(args.type,args.number) end)
generators.RemoveLSBs = R.newGenerator("generators","RemoveLSBs",{"type","rate"},{"number"}, function(args) return C.removeLSBs(args.type,args.number) end)
generators.Index = R.newGenerator("generators","Index",{"type","rate"},{"number","size"},
function(args)
if args.size~=nil then
Expand Down Expand Up @@ -85,11 +86,11 @@ function(args)
return RM.packTuple(args.type.params.list,args.bool)
end)

generators.FIFO = R.newGenerator("generators","FIFO",{"type","number","rate"},{},
generators.FIFO = R.newGenerator("generators","FIFO",{"type","number","rate"},{"bool"},
function(args)
J.err( R.isHandshake(args.type) or R.isHandshakeTrigger(args.type),"FIFO: expected handshake input, but is: "..tostring(args.type))
local ty = R.extractData(args.type)
return C.fifo( ty, args.number )
return C.fifo( ty, args.number, args.bool )
end)

generators.Add = R.newGenerator("generators","Add",{"type","rate"},{"bool","number"},
Expand Down Expand Up @@ -271,7 +272,7 @@ function(args)
err(false,"generators.Downsample: unsupported input type: "..tostring(args.type))
end
end)

generators.PosSeq = R.newGenerator("generators","PosSeq",{"size","number"},{"type"},
function(args)
if args.type~=nil then
Expand Down

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