Sound is downloaded from Wikimedia, which is public domain.
The design plays the first 2.5s of Beethovn Symphony No. 5 in C Minor Op. 67 repeatedly. Verified on WM8731PMOD 2021-03-09.
Main logic is in src/hdl/top.v. It contains logic for:
- Generate clocks: LRCLK, MCLK, BCLK, I2C_SCL etc
- Configure registers via i2c bus
- Read pcm data from block ram
- Output audio via i2s interface