unify test and run targets

jjts · Nov 6, 2023 · 7fce88e · 7fce88e
1 parent d82e624
commit 7fce88e
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Showing 2 changed files with 4 additions and 10 deletions.
diff --git a/submodules/LIB/hardware/fpga/Makefile b/submodules/LIB/hardware/fpga/Makefile
@@ -70,7 +70,7 @@ run: build $(RUN_DEPS)
 ifneq ($(NORUN),1)
 ifeq ($(BOARD_SERVER),)
 	cp $(EMB_DIR)/$(NAME)_firmware.bin .
-	$(BOARD_GRAB_CMD) -p '$(FPGA_PROG)' -c '$(CONSOLE_START_CMD)'
+	$(BOARD_GRAB_CMD) -p '$(FPGA_PROG)' -c '$(CONSOLE_START_CMD)'  && test "$$(cat test.log)" = "Test passed!"
 else
 	ssh $(BOARD_USER)@$(BOARD_SERVER) "if [ ! -d $(REMOTE_BUILD_DIR) ]; then mkdir -p $(REMOTE_BUILD_DIR); fi"
 	rsync $(BOARD_SYNC_FLAGS) -avz --delete --force ../.. $(BOARD_USER)@$(BOARD_SERVER):$(REMOTE_BUILD_DIR)
@@ -79,9 +79,6 @@ else
 endif
 endif
 
-test: run
-	sync && sleep 1 && test "$$(cat test.log)" = "Test passed!"
-
 # clean
 clean: $(FPGA_TOOL)-clean
 	find . -maxdepth 1 -type f -not \( -name "Makefile" -o -name "fpga_build.mk" -o -name "uut_build.mk" \) -delete

diff --git a/submodules/LIB/hardware/simulation/Makefile b/submodules/LIB/hardware/simulation/Makefile
@@ -68,9 +68,9 @@ BOARD_GRAB_CMD=../../scripts/board_client.py grab $(GRAB_TIMEOUT)
 run: remote_build_dir
 ifeq ($(SIM_SERVER),)
 ifneq ($(CONSOLE_CMD),)
-	$(BOARD_GRAB_CMD) -s 'make exec' -c '$(CONSOLE_CMD)'
+	$(BOARD_GRAB_CMD) -s 'make exec' -c '$(CONSOLE_CMD)' && test "$$(cat test.log)" = "Test passed!"
 else
-	make exec
+	make exec && test "$$(cat test.log)" = "Test passed!"
 endif
 else
 ifeq ($(VCD),1)
@@ -90,9 +90,6 @@ ifeq ($(VCD),1)
 	make waves
 endif
 
-test: run
-	sync && sleep 1 && test "$$(cat test.log)" = "Test passed!"
-
 waves:
 	if [ ! "`pgrep -u $(USER) gtkwave`" ]; then gtkwave -a uut.gtkw uut.vcd; fi &
 
@@ -116,4 +113,4 @@ debug:
 
 .PRECIOUS: uut.vcd
 
-.PHONY: build run remote_build_dir waves fix-vcd test run-tests gen-clean debug test
+.PHONY: build run waves gen-clean debug fix-vcd remote_build_dir