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Visualizer for Pipelined CPU's #124
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Very cool! I'm super excited to use this next quarter!
You should make sure your name is attached to this with more than just the commit message. I would suggest adding an "about" dialog or putting "By Kaelan..." in one of the bottom corners.
build.sbt
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@@ -92,7 +95,7 @@ lazy val root = (project in file(".")) | |||
libraryDependencies += scalatest % Lab4, | |||
testOptions in TestAll := Seq(Tests.Filter(allFilter)), | |||
// CHANGE THE LINE BELOW FOR EACH LAB!!!! Use the matching filter | |||
testOptions in Test := Seq(Tests.Filter(allFilter)), | |||
testOptions in Test := Seq(Tests.Filter(lab3Filter)), |
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This change should be reverted :)
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Looks like a couple of files got added accidentally on this commit :).
I just tried to run this and got the following error:
It looks like I might need to update the singularity container to have some other dependency installed. Do you know what the dependencies are for this? |
I figured it out. The following needs to be added to the
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Ah. I never tested in the singularity container as I have sbt on my local development environment. I guess the old container didn't have awt and dependencies. |
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LGTM! There's a lot that could be improved, but it's a really solid addition. Thanks!
This visualizer was written in scala-swing and the goal is to display the modules used in the pipelined CPU design and their relative location between the pipeline registers. The visualization should reflect the value of I/O on the modules and update every cycle.
Features: