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Optimize generated AST #9
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Interesting post, with DFG, register allocation stuff and optimizations: |
SSA without dominators: http://compilers.cs.uni-saarland.de/papers/bbhlmz13cc.pdf |
Transform irreductible cfgs Loops: A loop is a strong component in the cfg digraph. Multiple entry points means that there are gotos (it is irreductible). Dominators can help to determine irreductibility. |
Added Digraph + StrongComponent algorithm and initial implementation
Already implemented this in previous commit: https://en.wikipedia.org/wiki/Tarjan%27s_strongly_connected_components_algorithm Initial strategy for "relooping": Irreductible cfgs will use the current implementation (state machine) with while + switch for the moment which should be just a few functions await/async transformations or other languages.
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Some work on relooper (it is already able to detect ifs)
Optimized functions without loops and without traps, just with if/else chains
Haxe generated code is a simple machine state while + switch which is not as fast as it should be. In order to generate small and optimized code, we should transform the control flow graph into plain haxe structures: if, for, while...
Relevant concepts and links:
https://en.wikipedia.org/wiki/Control_flow_graph
https://en.wikipedia.org/wiki/Data-flow_analysis
https://en.wikipedia.org/wiki/Depth-first_search
https://en.wikipedia.org/wiki/Directed_acyclic_graph
https://en.wikipedia.org/wiki/Dominator_(graph_theory)
http://infolab.stanford.edu/~ullman/dragon/w06/lectures/dfa3.pdf
http://www.cs.rice.edu/~keith/Embed/dom.pdf
http://pages.cs.wisc.edu/~fischer/cs701.f08/lectures/Lecture19.4up.pdf
http://compilers.cs.uni-saarland.de/ssasem/talks/Dibyendu.Das.pdf
http://dragonbook.stanford.edu/lecture-notes/Columbia-COMS-W4117/07-09-27.html
Relooper: https://github.com/kripken/emscripten/blob/master/docs/paper.pdf?raw=true
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