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--========================= Controller.vhd ============================ | ||
-- ELE-340 Conception des systèmes ordinés | ||
-- HIVER 2010, Ecole de technologie supérieure | ||
-- Auteur : Jonathan Riel-Landry, Kevyn-Alexandre Pare, Sean Beitz | ||
-- ============================================================= | ||
-- Description: Banc De Registres | ||
-- ============================================================= | ||
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LIBRARY ieee; | ||
USE ieee.std_logic_1164.all; | ||
USE ieee.std_logic_arith.all; | ||
USE ieee.std_logic_unsigned. all; | ||
USE WORK.MIPSPackage.ALL; | ||
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ENTITY BancReg IS | ||
PORT ( | ||
ra1, ra2, wa3, wd3: IN STD_LOGIC_VECTOR (4 DOWNTO 0); | ||
RegWrite: IN STD_LOGIC ; | ||
rd1, rd2: OUT STD_LOGIC_VECTOR (4 DOWNTO 0) | ||
); | ||
END BancReg; | ||
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ARCHITECTURE BancRegArchitecture OF BancReg IS | ||
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BEGIN | ||
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END BancRegArchitecture; |