Merge pull request #37 from kendryte/feature/new_sched

Refactor scheduler and interrupt handler
kendryte · Feb 13, 2019 · 8f14b9d · 8f14b9d
2 parents c4c5219 + 935e3e1
commit 8f14b9d
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Showing 28 changed files with 741 additions and 1,021 deletions.
diff --git a/cmake/compile-flags.cmake b/cmake/compile-flags.cmake
@@ -14,12 +14,11 @@ add_compile_flags(LD
 # C Flags Settings
 add_compile_flags(BOTH
         -mcmodel=medany
-		-march=rv64imafdc
+		-march=rv64imafc
         -fno-common
         -ffunction-sections
         -fdata-sections
         -fstrict-volatile-bitfields
-        -fno-zero-initialized-in-bss
         -O2
         -ggdb
         )

diff --git a/lds/kendryte.ld b/lds/kendryte.ld
@@ -53,12 +53,14 @@ SECTIONS
     KEEP( *(.text.start) )
     KEEP( *(.text.systick) )
   } > ram : DATA
-
+  
   .init :
   {
     KEEP (*(SORT_NONE(.init)))
   } > ram : DATA
-
+
+  . = ALIGN(8);
+  . = .;
   .text :
   {
     *(.text.unlikely .text.*_unlikely .text.unlikely.*)
@@ -163,6 +165,7 @@ SECTIONS
   } > ram : DATA
   _edata = .; PROVIDE (edata = .);
 
+  . = ALIGN(8);
   . = .;
   __bss_start = .;
   .sbss2 : { *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*) } > ram : DYN_DATA

diff --git a/lib/arch/include/atomic.h b/lib/arch/include/atomic.h
@@ -37,23 +37,23 @@ extern "C"
                          : "memory"); \
     }
 
-#define atomic_set(ptr, val) (*(volatile typeof(*(ptr))*)(ptr) = val)
-#define atomic_read(ptr) (*(volatile typeof(*(ptr))*)(ptr))
+#define atomic_set(ptr, val) (*(volatile typeof(*(ptr)) *)(ptr) = val)
+#define atomic_read(ptr) (*(volatile typeof(*(ptr)) *)(ptr))
 
 #define atomic_add(ptr, inc) __sync_fetch_and_add(ptr, inc)
 #define atomic_or(ptr, inc) __sync_fetch_and_or(ptr, inc)
 #define atomic_swap(ptr, swp) __sync_lock_test_and_set(ptr, swp)
 #define atomic_cas(ptr, cmp, swp) __sync_val_compare_and_swap(ptr, cmp, swp)
 
-    static inline int spinlock_trylock(spinlock_t* lock)
+    static inline int spinlock_trylock(spinlock_t *lock)
     {
         int res = atomic_swap(&lock->lock, -1);
         /*Use memory barrier to keep coherency */
         mb();
         return res;
     }
 
-    static inline void spinlock_lock(spinlock_t* lock)
+    static inline void spinlock_lock(spinlock_t *lock)
     {
         do
         {
@@ -62,7 +62,7 @@ extern "C"
         } while (spinlock_trylock(lock));
     }
 
-    static inline void spinlock_unlock(spinlock_t* lock)
+    static inline void spinlock_unlock(spinlock_t *lock)
     {
         /*Use memory barrier to keep coherency */
         mb();
@@ -83,7 +83,7 @@ extern "C"
         .core = -1             \
     }
 
-    static inline int corelock_trylock(corelock_t* lock)
+    static inline int corelock_trylock(corelock_t *lock)
     {
         int res = 0;
         unsigned long core;
@@ -115,7 +115,7 @@ extern "C"
         return res;
     }
 
-    static inline void corelock_lock(corelock_t* lock)
+    static inline void corelock_lock(corelock_t *lock)
     {
         unsigned long core;
 
@@ -148,7 +148,7 @@ extern "C"
         spinlock_unlock(&lock->lock);
     }
 
-    static inline void corelock_unlock(corelock_t* lock)
+    static inline void corelock_unlock(corelock_t *lock)
     {
         unsigned long core;
 
@@ -168,17 +168,7 @@ extern "C"
         }
         else
         {
-            /* Different core release lock */
-            spinlock_unlock(&lock->lock);
-
-            register unsigned long a7 asm("a7") = 93;
-            register unsigned long a0 asm("a0") = 0;
-            register unsigned long a1 asm("a1") = 0;
-            register unsigned long a2 asm("a2") = 0;
-
-            asm volatile("scall"
-                         : "+r"(a0)
-                         : "r"(a1), "r"(a2), "r"(a7));
+            asm volatile("sbreak");
         }
         spinlock_unlock(&lock->lock);
     }

diff --git a/lib/arch/include/encoding.h b/lib/arch/include/encoding.h
@@ -160,6 +160,26 @@
 
 #define PTE_TABLE(PTE) (((PTE) & (PTE_V | PTE_R | PTE_W | PTE_X)) == PTE_V)
 
+#define SYS_apc_return 2013
+
+#define REG_EPC 0
+#define REG_RA 1
+#define REG_SP 2
+#define REG_T0 5
+#define REG_T1 6
+#define REG_A0 10
+#define REG_A1 11
+#define REG_A2 12
+#define REG_A3 13
+#define REG_A4 14
+#define REG_A5 15
+#define REG_A6 16
+#define REG_A7 17
+#define REG_APC_PROC 64
+#define REG_APC_RET 65
+
+#define NUM_XCEPT_REGS (66)
+
 #ifdef __riscv
 
 #ifdef __riscv64