Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-…

…linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQs
  MIPS: PowerTV: Streamline access to platform device registers
  MIPS: Fix vmlinuz build for 32bit-only math shells
  MIPS: Add support of LZO-compressed kernels

arch/mips/Kconfig

@@ -1311,6 +1311,7 @@ config SYS_SUPPORTS_ZBOOT
 	select HAVE_KERNEL_GZIP
 	select HAVE_KERNEL_BZIP2
 	select HAVE_KERNEL_LZMA
+	select HAVE_KERNEL_LZO
 
 config SYS_SUPPORTS_ZBOOT_UART16550
 	bool

arch/mips/boot/compressed/Makefile

@@ -14,8 +14,11 @@
 
 # compressed kernel load addr: VMLINUZ_LOAD_ADDRESS > VMLINUX_LOAD_ADDRESS + VMLINUX_SIZE
 VMLINUX_SIZE := $(shell wc -c $(objtree)/$(KBUILD_IMAGE) 2>/dev/null | cut -d' ' -f1)
-VMLINUX_SIZE := $(shell [ -n "$(VMLINUX_SIZE)" ] && echo $$(($(VMLINUX_SIZE) + (65536 - $(VMLINUX_SIZE) % 65536))))
-VMLINUZ_LOAD_ADDRESS := 0x$(shell [ -n "$(VMLINUX_SIZE)" ] && printf %x $$(($(VMLINUX_LOAD_ADDRESS) + $(VMLINUX_SIZE))))
+VMLINUX_SIZE := $(shell [ -n "$(VMLINUX_SIZE)" ] && echo -n $$(($(VMLINUX_SIZE) + (65536 - $(VMLINUX_SIZE) % 65536))))
+# VMLINUZ_LOAD_ADDRESS = concat "high32 of VMLINUX_LOAD_ADDRESS" and "(low32 of VMLINUX_LOAD_ADDRESS) + VMLINUX_SIZE"
+HIGH32 := $(shell A=$(VMLINUX_LOAD_ADDRESS); [ $${\#A} -gt 10 ] && expr substr "$(VMLINUX_LOAD_ADDRESS)" 3 $$(($${\#A} - 10)))
+LOW32 := $(shell [ -n "$(HIGH32)" ] && A=11 || A=3; expr substr "$(VMLINUX_LOAD_ADDRESS)" $${A} 8)
+VMLINUZ_LOAD_ADDRESS := 0x$(shell [ -n "$(VMLINUX_SIZE)" -a -n "$(LOW32)" ] && printf "$(HIGH32)%08x" $$(($(VMLINUX_SIZE) + 0x$(LOW32))))
 
 # set the default size of the mallocing area for decompressing
 BOOT_HEAP_SIZE := 0x400000
@@ -41,9 +44,11 @@ $(obj)/vmlinux.bin: $(KBUILD_IMAGE)
 suffix_$(CONFIG_KERNEL_GZIP)  = gz
 suffix_$(CONFIG_KERNEL_BZIP2) = bz2
 suffix_$(CONFIG_KERNEL_LZMA)  = lzma
+suffix_$(CONFIG_KERNEL_LZO)   = lzo
 tool_$(CONFIG_KERNEL_GZIP)    = gzip
 tool_$(CONFIG_KERNEL_BZIP2)   = bzip2
 tool_$(CONFIG_KERNEL_LZMA)    = lzma
+tool_$(CONFIG_KERNEL_LZO)     = lzo
 $(obj)/vmlinux.$(suffix_y): $(obj)/vmlinux.bin
 	$(call if_changed,$(tool_y))
 

arch/mips/boot/compressed/decompress.c

@@ -77,6 +77,10 @@ void *memset(void *s, int c, size_t n)
 #include "../../../../lib/decompress_unlzma.c"
 #endif
 
+#ifdef CONFIG_KERNEL_LZO
+#include "../../../../lib/decompress_unlzo.c"
+#endif
+
 void decompress_kernel(unsigned long boot_heap_start)
 {
 	int zimage_size;

arch/mips/include/asm/irq.h

@@ -135,6 +135,7 @@ extern void free_irqno(unsigned int irq);
 #define CP0_LEGACY_COMPARE_IRQ 7
 
 extern int cp0_compare_irq;
+extern int cp0_compare_irq_shift;
 extern int cp0_perfcount_irq;
 
 #endif /* _ASM_IRQ_H */

arch/mips/include/asm/mach-powertv/asic_reg_map.h

@@ -0,0 +1,90 @@
+/*
+ *				asic_reg_map.h
+ *
+ * A macro-enclosed list of the elements for the register_map structure for
+ * use in defining and manipulating the structure.
+ *
+ * Copyright (C) 2009  Cisco Systems, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+REGISTER_MAP_ELEMENT(eic_slow0_strt_add)
+REGISTER_MAP_ELEMENT(eic_cfg_bits)
+REGISTER_MAP_ELEMENT(eic_ready_status)
+REGISTER_MAP_ELEMENT(chipver3)
+REGISTER_MAP_ELEMENT(chipver2)
+REGISTER_MAP_ELEMENT(chipver1)
+REGISTER_MAP_ELEMENT(chipver0)
+REGISTER_MAP_ELEMENT(uart1_intstat)
+REGISTER_MAP_ELEMENT(uart1_inten)
+REGISTER_MAP_ELEMENT(uart1_config1)
+REGISTER_MAP_ELEMENT(uart1_config2)
+REGISTER_MAP_ELEMENT(uart1_divisorhi)
+REGISTER_MAP_ELEMENT(uart1_divisorlo)
+REGISTER_MAP_ELEMENT(uart1_data)
+REGISTER_MAP_ELEMENT(uart1_status)
+REGISTER_MAP_ELEMENT(int_stat_3)
+REGISTER_MAP_ELEMENT(int_stat_2)
+REGISTER_MAP_ELEMENT(int_stat_1)
+REGISTER_MAP_ELEMENT(int_stat_0)
+REGISTER_MAP_ELEMENT(int_config)
+REGISTER_MAP_ELEMENT(int_int_scan)
+REGISTER_MAP_ELEMENT(ien_int_3)
+REGISTER_MAP_ELEMENT(ien_int_2)
+REGISTER_MAP_ELEMENT(ien_int_1)
+REGISTER_MAP_ELEMENT(ien_int_0)
+REGISTER_MAP_ELEMENT(int_level_3_3)
+REGISTER_MAP_ELEMENT(int_level_3_2)
+REGISTER_MAP_ELEMENT(int_level_3_1)
+REGISTER_MAP_ELEMENT(int_level_3_0)
+REGISTER_MAP_ELEMENT(int_level_2_3)
+REGISTER_MAP_ELEMENT(int_level_2_2)
+REGISTER_MAP_ELEMENT(int_level_2_1)
+REGISTER_MAP_ELEMENT(int_level_2_0)
+REGISTER_MAP_ELEMENT(int_level_1_3)
+REGISTER_MAP_ELEMENT(int_level_1_2)
+REGISTER_MAP_ELEMENT(int_level_1_1)
+REGISTER_MAP_ELEMENT(int_level_1_0)
+REGISTER_MAP_ELEMENT(int_level_0_3)
+REGISTER_MAP_ELEMENT(int_level_0_2)
+REGISTER_MAP_ELEMENT(int_level_0_1)
+REGISTER_MAP_ELEMENT(int_level_0_0)
+REGISTER_MAP_ELEMENT(int_docsis_en)
+REGISTER_MAP_ELEMENT(mips_pll_setup)
+REGISTER_MAP_ELEMENT(usb_fs)
+REGISTER_MAP_ELEMENT(test_bus)
+REGISTER_MAP_ELEMENT(crt_spare)
+REGISTER_MAP_ELEMENT(usb2_ohci_int_mask)
+REGISTER_MAP_ELEMENT(usb2_strap)
+REGISTER_MAP_ELEMENT(ehci_hcapbase)
+REGISTER_MAP_ELEMENT(ohci_hc_revision)
+REGISTER_MAP_ELEMENT(bcm1_bs_lmi_steer)
+REGISTER_MAP_ELEMENT(usb2_control)
+REGISTER_MAP_ELEMENT(usb2_stbus_obc)
+REGISTER_MAP_ELEMENT(usb2_stbus_mess_size)
+REGISTER_MAP_ELEMENT(usb2_stbus_chunk_size)
+REGISTER_MAP_ELEMENT(pcie_regs)
+REGISTER_MAP_ELEMENT(tim_ch)
+REGISTER_MAP_ELEMENT(tim_cl)
+REGISTER_MAP_ELEMENT(gpio_dout)
+REGISTER_MAP_ELEMENT(gpio_din)
+REGISTER_MAP_ELEMENT(gpio_dir)
+REGISTER_MAP_ELEMENT(watchdog)
+REGISTER_MAP_ELEMENT(front_panel)
+REGISTER_MAP_ELEMENT(misc_clk_ctl1)
+REGISTER_MAP_ELEMENT(misc_clk_ctl2)
+REGISTER_MAP_ELEMENT(crt_ext_ctl)
+REGISTER_MAP_ELEMENT(register_maps)

arch/mips/include/asm/mach-powertv/asic_regs.h

@@ -35,11 +35,12 @@ enum asic_type {
 #define CRONUS_11	0x0B4C1C21
 #define CRONUSLITE_10	0x0B4C1C40
 
-#define NAND_FLASH_BASE	0x03000000
-#define ZEUS_IO_BASE	0x09000000
+#define NAND_FLASH_BASE		0x03000000
 #define CALLIOPE_IO_BASE	0x08000000
-#define CRONUS_IO_BASE	0x09000000
-#define ASIC_IO_SIZE	0x01000000
+#define CRONUS_IO_BASE		0x09000000
+#define ZEUS_IO_BASE		0x09000000
+
+#define ASIC_IO_SIZE		0x01000000
 
 /* Definitions for backward compatibility */
 #define UART1_INTSTAT	uart1_intstat
@@ -52,96 +53,62 @@ enum asic_type {
 #define UART1_STATUS	uart1_status
 
 /* ASIC register enumeration */
+union register_map_entry {
+	unsigned long phys;
+	u32 *virt;
+};
+
+#define REGISTER_MAP_ELEMENT(x) union register_map_entry x;
 struct register_map {
-	u32 eic_slow0_strt_add;
-	u32 eic_cfg_bits;
-	u32 eic_ready_status;
-
-	u32 chipver3;
-	u32 chipver2;
-	u32 chipver1;
-	u32 chipver0;
-
-	u32 uart1_intstat;
-	u32 uart1_inten;
-	u32 uart1_config1;
-	u32 uart1_config2;
-	u32 uart1_divisorhi;
-	u32 uart1_divisorlo;
-	u32 uart1_data;
-	u32 uart1_status;
-
-	u32 int_stat_3;
-	u32 int_stat_2;
-	u32 int_stat_1;
-	u32 int_stat_0;
-	u32 int_config;
-	u32 int_int_scan;
-	u32 ien_int_3;
-	u32 ien_int_2;
-	u32 ien_int_1;
-	u32 ien_int_0;
-	u32 int_level_3_3;
-	u32 int_level_3_2;
-	u32 int_level_3_1;
-	u32 int_level_3_0;
-	u32 int_level_2_3;
-	u32 int_level_2_2;
-	u32 int_level_2_1;
-	u32 int_level_2_0;
-	u32 int_level_1_3;
-	u32 int_level_1_2;
-	u32 int_level_1_1;
-	u32 int_level_1_0;
-	u32 int_level_0_3;
-	u32 int_level_0_2;
-	u32 int_level_0_1;
-	u32 int_level_0_0;
-	u32 int_docsis_en;
-
-	u32 mips_pll_setup;
-	u32 usb_fs;
-	u32 test_bus;
-	u32 crt_spare;
-	u32 usb2_ohci_int_mask;
-	u32 usb2_strap;
-	u32 ehci_hcapbase;
-	u32 ohci_hc_revision;
-	u32 bcm1_bs_lmi_steer;
-	u32 usb2_control;
-	u32 usb2_stbus_obc;
-	u32 usb2_stbus_mess_size;
-	u32 usb2_stbus_chunk_size;
-
-	u32 pcie_regs;
-	u32 tim_ch;
-	u32 tim_cl;
-	u32 gpio_dout;
-	u32 gpio_din;
-	u32 gpio_dir;
-	u32 watchdog;
-	u32 front_panel;
-
-	u32 register_maps;
+#include <asm/mach-powertv/asic_reg_map.h>
 };
+#undef REGISTER_MAP_ELEMENT
+
+/**
+ * register_map_offset_phys - add an offset to the physical address
+ * @map:	Pointer to the &struct register_map
+ * @offset:	Value to add
+ *
+ * Only adds the base to non-zero physical addresses
+ */
+static inline void register_map_offset_phys(struct register_map *map,
+	unsigned long offset)
+{
+#define REGISTER_MAP_ELEMENT(x)		do {				\
+		if (map->x.phys != 0)					\
+			map->x.phys += offset;				\
+	} while (false);
+
+#include <asm/mach-powertv/asic_reg_map.h>
+#undef REGISTER_MAP_ELEMENT
+}
+
+/**
+ * register_map_virtualize - Convert &register_map to virtual addresses
+ * @map:	Pointer to &register_map to virtualize
+ */
+static inline void register_map_virtualize(struct register_map *map)
+{
+#define REGISTER_MAP_ELEMENT(x)		do {				\
+		map->x.virt = (!map->x.phys) ? NULL :			\
+			UNCAC_ADDR(phys_to_virt(map->x.phys));		\
+	} while (false);
+
+#include <asm/mach-powertv/asic_reg_map.h>
+#undef REGISTER_MAP_ELEMENT
+}
 
-extern enum asic_type asic;
-extern const struct register_map *register_map;
-extern unsigned long asic_phy_base;	/* Physical address of ASIC */
-extern unsigned long asic_base;		/* Virtual address of ASIC */
+extern struct register_map _asic_register_map;
 
 /*
  * Macros to interface to registers through their ioremapped address
- * asic_reg_offset	Returns the offset of a given register from the start
- *			of the ASIC address space
  * asic_reg_phys_addr	Returns the physical address of the given register
  * asic_reg_addr	Returns the iomapped virtual address of the given
  *			register.
  */
-#define asic_reg_offset(x)	(register_map->x)
-#define asic_reg_phys_addr(x)	(asic_phy_base + asic_reg_offset(x))
-#define asic_reg_addr(x) \
-	((unsigned int *) (asic_base + asic_reg_offset(x)))
+#define asic_reg_addr(x)	(_asic_register_map.x.virt)
+#define asic_reg_phys_addr(x)	(virt_to_phys((void *) CAC_ADDR(	\
+					(unsigned long) asic_reg_addr(x))))
 
 /*
  * The asic_reg macro is gone. It should be replaced by either asic_read or

arch/mips/include/asm/mipsregs.h

@@ -405,6 +405,16 @@
 #define ST0_CU3			0x80000000
 #define ST0_XX			0x80000000	/* MIPS IV naming */
 
+/*
+ * Bitfields and bit numbers in the coprocessor 0 IntCtl register. (MIPSR2)
+ *
+ * Refer to your MIPS R4xx0 manual, chapter 5 for explanation.
+ */
+#define INTCTLB_IPPCI		26
+#define INTCTLF_IPPCI		(_ULCAST_(7) << INTCTLB_IPPCI)
+#define INTCTLB_IPTI		29
+#define INTCTLF_IPTI		(_ULCAST_(7) << INTCTLB_IPTI)
+
 /*
  * Bitfields and bit numbers in the coprocessor 0 cause register.
  *
@@ -434,6 +444,8 @@
 #define  CAUSEF_IV		(_ULCAST_(1)   << 23)
 #define  CAUSEB_CE		28
 #define  CAUSEF_CE		(_ULCAST_(3)   << 28)
+#define  CAUSEB_TI		30
+#define  CAUSEF_TI		(_ULCAST_(1)   << 30)
 #define  CAUSEB_BD		31
 #define  CAUSEF_BD		(_ULCAST_(1)   << 31)
 

arch/mips/kernel/cevt-r4k.c

@@ -97,7 +97,7 @@ void mips_event_handler(struct clock_event_device *dev)
  */
 static int c0_compare_int_pending(void)
 {
-	return (read_c0_cause() >> cp0_compare_irq) & 0x100;
+	return (read_c0_cause() >> cp0_compare_irq_shift) & (1ul << CAUSEB_IP);
 }
 
 /*

arch/mips/kernel/traps.c

@@ -1403,6 +1403,7 @@ extern void flush_tlb_handlers(void);
  * Timer interrupt
  */
 int cp0_compare_irq;
+int cp0_compare_irq_shift;
 
 /*
  * Performance counter IRQ or -1 if shared with timer
@@ -1493,8 +1494,9 @@ void __cpuinit per_cpu_trap_init(void)
 	 *  o read IntCtl.IPPCI to determine the performance counter interrupt
 	 */
 	if (cpu_has_mips_r2) {
-		cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
-		cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
+		cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP;
+		cp0_compare_irq = (read_c0_intctl() >> INTCTLB_IPTI) & 7;
+		cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7;
 		if (cp0_perfcount_irq == cp0_compare_irq)
 			cp0_perfcount_irq = -1;
 	} else {