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Commits on May 1, 2019

• Update README.md

  alex-nugent

  committedMay 1, 2019
  b6a11f4

Commits on Apr 28, 2019

• Update README.md

  alex-nugent

  committedApr 28, 2019
  7eca617

Commits on Dec 24, 2018

• Merge pull request #2 from RedaAzzam/patch-1

  alex-nugent

  committedDec 24, 2018
  ab3c12c

Commits on Dec 11, 2018

• Create knowm_model_modified_verilogA_code

  RedaAzzam

  committedDec 11, 2018
  59db05d

Commits on Mar 31, 2017

• update Knowm and Joglekar model and sim for device ID 4 and 5

  timmolter

  committedMar 31, 2017
  85220b9

Commits on Mar 3, 2017

• Merge pull request #1 from michea/master

  timmolter

  committedMar 3, 2017
  b2bb471

• Changed node polarity of ri.i0 which represents node current value in Master::updateState()

  michea

  committedMar 3, 2017
  c363f07

Commits on Feb 11, 2017

• Modified DeviceTraits struct and deviceTypeName() in .H files to use level = X in model card for YMemristor device, updated deviceRegister() in .C

  michea

  committedFeb 11, 2017
  1299dfd

Commits on Jan 24, 2017

• knowm model tweak

  timmolter

  committedJan 24, 2017
  147ff12

• Sinh ==> Generic rename

  timmolter

  committedJan 24, 2017
  63c6c84

• Knowm Verilog cleanup

  timmolter

  committedJan 24, 2017
  a356392

Commits on Jan 23, 2017

• MSS ==> Knowm rename

  timmolter

  committedJan 23, 2017
  cb0644d

• rename Pershin

  timmolter

  committedJan 23, 2017
  c02c677

• rename Knowm

  timmolter

  committedJan 23, 2017
  7e137fd

• rename Biolek

  timmolter

  committedJan 23, 2017
  1a8b6fb

• rename Joglekar

  timmolter

  committedJan 23, 2017
  91283b1

• Knowm Xyce remove N

  timmolter

  committedJan 23, 2017
  b26881d

• added copyright

  timmolter

  committedJan 23, 2017
  fcded05

• Yakopcic LTSpice

  timmolter

  committedJan 23, 2017
  5f48b20

• U Mich LTSpice

  timmolter

  committedJan 23, 2017
  19a276e

• Knowm LTSpice

  timmolter

  committedJan 23, 2017
  41bb81d

• Joglekar LTSpice

  timmolter

  committedJan 23, 2017
  65ab632

• biolek LTSpice

  timmolter

  committedJan 23, 2017
  cf3c1ae

Commits on Jan 15, 2017

• Yakopcic model in Xyce

  timmolter

  committedJan 15, 2017
  14dae52

• update to MSS model

  timmolter

  committedJan 15, 2017
  952412d

Commits on Jan 11, 2017

• MMSS Native implementation in Xyce

  timmolter

  committedJan 11, 2017
  90c54ba

• Joglekar Native implementation in Xyce

  timmolter

  committedJan 11, 2017
  c5d8e17

Commits on Dec 15, 2016

• initial

  timmolter

  committedDec 15, 2016
  340a62b