Processor Simulator for ToyRISC

This repository contains the code for processor simulator for ToyRISC ISA, written in Java, as a part of coursework for Computer Architecture Lab.

Here is a description of the folders in this repository:

1. Assignment 1: Programs written in ToyRISC ISA
2. Assignment 2: Assembler for ToyRISC ISA
3. Assignment 3: Single cycle processor simulator
4. Assignment 4: Pipelined core model processor simulator
5. Assignment 5: Discrete event simulator
6. Assignment 6: Implementation of caches