This repository contains the code for processor simulator for ToyRISC ISA, written in Java, as a part of coursework for Computer Architecture Lab.
Here is a description of the folders in this repository:
- Assignment 1: Programs written in ToyRISC ISA
- Assignment 2: Assembler for ToyRISC ISA
- Assignment 3: Single cycle processor simulator
- Assignment 4: Pipelined core model processor simulator
- Assignment 5: Discrete event simulator
- Assignment 6: Implementation of caches