changed polarity of ASIC

kwonalbert · Oct 16, 2014 · efa13f2 · efa13f2
1 parent 98cf904
commit efa13f2
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Showing 39 changed files with 3,274 additions and 3,256 deletions.
diff --git a/TinyORAMCore.v b/TinyORAMCore.v
diff --git a/addr/AddrGen.v b/addr/AddrGen.v
@@ -52,7 +52,7 @@ module AddrGen
 	reg RW, BH;
 	reg [BBSTWidth-1:0] BktCounter;
 
-`ifdef ASIC
+`ifndef FPGA
 	AddrGenBktHead
 	abt 	(  	.Clock(		Clock),
 						.Reset(		Reset),

diff --git a/addr/AddrGenBktHead.v b/addr/AddrGenBktHead.v
@@ -33,7 +33,7 @@ module AddrGenBktHead
 	output [ORAML:0] STIdx, BktIdxInST;  // tmp output for debugging
 
 
-`ifndef ASIC	
+`ifdef FPGA	
 	initial begin	// don't delete, REWAES needs this to get rid of Reset
 		currentLevel = ORAML+1;
 	end

diff --git a/backend/BackendCoreController.v b/backend/BackendCoreController.v
@@ -169,7 +169,7 @@ module BackendCoreController(
 	Register #( .Width(1),	.Initial(1'b0))
 		first_access (Clock, Reset, CommandRequest, 1'b0, 1'bx, OneAccessHasOccurred);
 
-	`ifndef ASIC
+	`ifdef FPGA
 		initial begin
 			CS = ST_Idle;
 		end 
@@ -359,7 +359,7 @@ module BackendCoreController(
 
 		assign	DummyLeaf =							DummyLeaf_Pre;
 
-`ifndef ASIC
+`ifdef FPGA
 		initial begin
 			ROPAddr =								{ORAMU{1'bx}};
 			ROLeaf =								{ORAML{1'bx}};

diff --git a/backend/PathORAMBackend.v b/backend/PathORAMBackend.v
@@ -287,7 +287,7 @@ module PathORAMBackend(
 
 							.ORAMUValid(			ORAMUValid))
 			bend_core(		.Clock(					Clock),
-				`ifdef ASIC
+				`ifndef FPGA
 							.Reset(					Reset),
 				`else
 							.Reset(					1'b0),
@@ -347,7 +347,7 @@ module PathORAMBackend(
 							.ORAMUValid(			ORAMUValid))
 			aes(			.Clock(					Clock),
 							.FastClock(				AESClock),
-			`ifdef ASIC
+			`ifndef FPGA
 							.Reset(					Reset),
 			`else
 							.Reset(					1'b0),
@@ -382,7 +382,7 @@ module PathORAMBackend(
 							.FEDWidth(				FEDWidth),
 							.BEDWidth(				BEDWidth))
 				aes(		.Clock(					Clock),
-				`ifdef ASIC
+				`ifndef FPGA
 							.Reset(					Reset),
 				`else
 							.Reset(					1'b0),