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Merge 5ff6df1 into dbbb9bc
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rsetaluri committed Jul 23, 2018
2 parents dbbb9bc + 5ff6df1 commit 995098b
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7 changes: 7 additions & 0 deletions fault/logging.py
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,13 @@ def info(message, *args, **kwargs):
log.info(message, *args, **kwargs)


<<<<<<< HEAD
def debug(message, *args, **kwargs):
log.debug(message, *args, **kwargs)


=======
>>>>>>> dbbb9bc8a18cc012201c8fa2e72e75dec92d8c2d
def warning(message, *args, **kwargs):
log.warning(message, *args, **kwargs)

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80 changes: 80 additions & 0 deletions fault/python_simulator_target.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,80 @@
import fault.logging
from .target import Target
from magma.simulator.python_simulator import PythonSimulator
from fault.array import Array


def convert_value(val):
if isinstance(val, Array):
return val.value
return val


class PythonSimulatorTarget(Target):
def __init__(self, circuit, test_vectors, clock):
super().__init__(circuit, test_vectors)
self._clock = clock
self._simulator = None

def init_simulator(self):
self._simulator = PythonSimulator(self._circuit, self._clock)

def __set_value(self, port, val):
fault.logging.debug(f"Setting {self._circuit.name}.{port.name.name} to "
f"{val}")
val = convert_value(val)
self._simulator.set_value(port, val)

def __check_value(self, port, expected_val):
fault.logging.debug(f"Asserting {self._circuit.name}.{port.name.name} "
f"is {expected_val}")
sim_val = self._simulator.get_value(port)
expected_val = convert_value(expected_val)
assert sim_val == expected_val

def __parse_tv(self, tv):
inputs = {}
steps = 0
outputs = {}
ports = self._circuit.interface.ports
for i, port in enumerate(ports.values()):
val = tv[i]
if val is None:
continue
if port is self._clock:
if self._simulator.get_value(self._clock) != val:
steps += 1
elif port.isoutput():
inputs[port] = val
elif port.isinput():
outputs[port] = val
else:
raise NotImplementedError()
return (inputs, steps, outputs)

def __process_inputs(self, inputs):
for port, val in inputs.items():
self.__set_value(port, val)

def __process_clock(self, steps):
if steps == 0:
return True
self._simulator.advance(steps)
return False

def __process_outputs(self, outputs):
for port, val in outputs.items():
self.__check_value(port, val)

def run(self):
self.init_simulator()
ports = self._circuit.interface.ports
test_vector_length = len(self._test_vectors[0])
assert len(ports.keys()) == test_vector_length
for tv in self._test_vectors:
(inputs, steps, outputs) = self.__parse_tv(tv)
self.__process_inputs(inputs)
evaluate = self.__process_clock(steps)
if evaluate:
self._simulator.evaluate()
self.__process_outputs(outputs)
4 changes: 4 additions & 0 deletions tests/test_logging.py
Original file line number Diff line number Diff line change
Expand Up @@ -3,5 +3,9 @@

def test_logging_smoke():
fault.logging.info("some info msg")
<<<<<<< HEAD
fault.logging.debug("some debug msg")
=======
>>>>>>> dbbb9bc8a18cc012201c8fa2e72e75dec92d8c2d
fault.logging.warning("some warning msg")
fault.logging.error("some error msg")
40 changes: 40 additions & 0 deletions tests/test_python_simulator_target.py
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import random
import magma as m
import common
from fault.python_simulator_target import *
from bit_vector import BitVector


def test_python_simulator_target_basic():
"""
Test basic python simuilator workflow with a simple circuit.
"""
circ = common.TestBasicCircuit
test_vectors = [
[BitVector(0, 1), BitVector(0, 1)],
[BitVector(1, 1), BitVector(1, 1)]
]
target = PythonSimulatorTarget(circ, test_vectors, None)
target.run()


def test_python_simulator_target_nested_arrays():
circ = common.TestNestedArraysCircuit
tester = fault.Tester(circ)
for i in range(3):
val = random.randint(0, (1 << 4) - 1)
tester.poke(circ.I[i], val)
tester.expect(circ.O[i], val)

target = PythonSimulatorTarget(circ, tester.test_vectors, None)
target.run()


def test_python_simulator_target_clock():
circ = common.TestBasicClkCircuit
test_vectors = [
[BitVector(0, 1), BitVector(0, 1), BitVector(0, 1)],
[BitVector(0, 1), BitVector(0, 1), BitVector(1, 1)]
]
target = PythonSimulatorTarget(circ, test_vectors, circ.CLK)
target.run()

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