Composite signal support

Overview

This is still in the process of being drafted.

Currently, buses in gEDA schematics are entirely graphical --- they are completely ignored by gnetlist. It would be useful, however, to properly support signals that are built up from multiple primitive wires.

For example, it would be nice to be able to draw a block diagram involving large buses and have the modules connected up as shown by gnetlist without having to hand-connect every individual wire. It would also be nice to draw a differential pair using a single line (since the differential pair is really a single single and the two conductors need to go everywhere together anyway).

Signals would need to be able to be composed at several different levels. For example, an FPGA may have its pins paired up as LVDS pairs, which are grouped into various data, address and control buses, which are grouped into a "FLASH" bus and a "CODEC" bus. Being able to compose signals would facilitate the use of gschem to display the results of synthesising complex VHDL designs.

See also: http://www.delorie.com/pcb/bus-pins.html