stm32f7: fix RCC_APB1 defns for USART7/USART8

The reset and low power definitions for USART7/USART8 were correct, but not the primary enable registers. Fixes: #969
libopencm3 · Sep 24, 2018 · 6b0fd86 · 6b0fd86
1 parent 0d7f1f7
commit 6b0fd86
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/include/libopencm3/stm32/f7/rcc.h b/include/libopencm3/stm32/f7/rcc.h
@@ -708,8 +708,8 @@ enum rcc_periph_clken {
 	RCC_CEC		= _REG_BIT(0x40, 27),
 	RCC_PWR		= _REG_BIT(0x40, 28),
 	RCC_DAC		= _REG_BIT(0x40, 29),
-	RCC_SPI7	= _REG_BIT(0x40, 30),
-	RCC_SPI8	= _REG_BIT(0x40, 31),
+	RCC_USART7	= _REG_BIT(0x40, 30),
+	RCC_USART8	= _REG_BIT(0x40, 31),
 
 	/* APB2 peripherals */
 	RCC_TIM1	= _REG_BIT(0x44, 0),