util: Add barriers support for RISC-V

Add barriers support for RISC-V architecture Signed-off-by: v.v.mitrofanov <v.v.mitrofanov@yadro.com>
linux-rdma · Feb 4, 2022 · 63b41f2 · 63b41f2
1 parent f1a1a46
commit 63b41f2
Showing 1 changed file with 6 additions and 0 deletions.
diff --git a/util/udma_barrier.h b/util/udma_barrier.h
@@ -98,6 +98,8 @@
 #define udma_to_device_barrier() asm volatile("" ::: "memory")
 #elif defined(__loongarch__)
 #define udma_to_device_barrier() asm volatile("dbar 0" ::: "memory")
+#elif defined(__riscv)
+#define udma_to_device_barrier() asm volatile("fence ow,ow" ::: "memory")
 #else
 #error No architecture specific memory barrier defines found!
 #endif
@@ -132,6 +134,8 @@
 #define udma_from_device_barrier() asm volatile("" ::: "memory")
 #elif defined(__loongarch__)
 #define udma_from_device_barrier() asm volatile("dbar 0" ::: "memory")
+#elif defined(__riscv)
+#define udma_from_device_barrier() asm volatile("fence ir,ir" ::: "memory")
 #else
 #error No architecture specific memory barrier defines found!
 #endif
@@ -198,6 +202,8 @@
 #define mmio_flush_writes() asm volatile("" ::: "memory")
 #elif defined(__loongarch__)
 #define mmio_flush_writes() asm volatile("dbar 0" ::: "memory")
+#elif defined(__riscv)
+#define mmio_flush_writes() asm volatile("fence ow,ow" ::: "memory")
 #else
 #error No architecture specific memory barrier defines found!
 #endif