Merge pull request #786 from mkalderon/master

libqedr: Add EDPM size limit and mode

kernel-headers/rdma/qedr-abi.h

@@ -39,8 +39,9 @@
 
 /* user kernel communication data structures. */
 enum qedr_alloc_ucontext_flags {
-	QEDR_ALLOC_UCTX_RESERVED	= 1 << 0,
-	QEDR_ALLOC_UCTX_DB_REC		= 1 << 1
+	QEDR_ALLOC_UCTX_EDPM_MODE	= 1 << 0,
+	QEDR_ALLOC_UCTX_DB_REC		= 1 << 1,
+	QEDR_SUPPORT_DPM_SIZES		= 1 << 2,
 };
 
 struct qedr_alloc_ucontext_req {
@@ -50,13 +51,14 @@ struct qedr_alloc_ucontext_req {
 
 #define QEDR_LDPM_MAX_SIZE	(8192)
 #define QEDR_EDPM_TRANS_SIZE	(64)
+#define QEDR_EDPM_MAX_SIZE	(ROCE_REQ_MAX_INLINE_DATA_SIZE)
 
 enum qedr_rdma_dpm_type {
 	QEDR_DPM_TYPE_NONE		= 0,
 	QEDR_DPM_TYPE_ROCE_ENHANCED	= 1 << 0,
 	QEDR_DPM_TYPE_ROCE_LEGACY	= 1 << 1,
 	QEDR_DPM_TYPE_IWARP_LEGACY	= 1 << 2,
-	QEDR_DPM_TYPE_RESERVED		= 1 << 3,
+	QEDR_DPM_TYPE_ROCE_EDPM_MODE	= 1 << 3,
 	QEDR_DPM_SIZES_SET		= 1 << 4,
 };
 
@@ -77,6 +79,8 @@ struct qedr_alloc_ucontext_resp {
 	__u16 ldpm_limit_size;
 	__u8 edpm_trans_size;
 	__u8 reserved;
+	__u16 edpm_limit_size;
+	__u8 padding[6];
 };
 
 struct qedr_alloc_pd_ureq {

providers/qedr/common_hsi.h

@@ -1010,12 +1010,14 @@ struct db_roce_dpm_params
 #define DB_ROCE_DPM_PARAMS_WQE_SIZE_SHIFT       16
 #define DB_ROCE_DPM_PARAMS_RESERVED0_MASK       0x1
 #define DB_ROCE_DPM_PARAMS_RESERVED0_SHIFT      27
-#define DB_ROCE_DPM_PARAMS_COMPLETION_FLG_MASK  0x1 /* RoCE completion flag */
-#define DB_ROCE_DPM_PARAMS_COMPLETION_FLG_SHIFT 28
+#define DB_ROCE_DPM_PARAMS_ACK_REQUEST_MASK     0x1 /* RoCE ack request (will be set to 1) */
+#define DB_ROCE_DPM_PARAMS_ACK_REQUEST_SHIFT    28
 #define DB_ROCE_DPM_PARAMS_S_FLG_MASK           0x1 /* RoCE S flag */
 #define DB_ROCE_DPM_PARAMS_S_FLG_SHIFT          29
-#define DB_ROCE_DPM_PARAMS_RESERVED1_MASK       0x3
-#define DB_ROCE_DPM_PARAMS_RESERVED1_SHIFT      30
+#define DB_ROCE_DPM_PARAMS_COMPLETION_FLG_MASK  0x1 /* RoCE completion flag for FW use */
+#define DB_ROCE_DPM_PARAMS_COMPLETION_FLG_SHIFT 30
+#define DB_ROCE_DPM_PARAMS_RESERVED1_MASK       0x1
+#define DB_ROCE_DPM_PARAMS_RESERVED1_SHIFT      31
 };
 
 /*

providers/qedr/qelr.h

@@ -123,8 +123,9 @@ struct qelr_device {
 };
 
 enum qelr_dpm_flags {
-	QELR_DPM_FLAGS_ENHANCED = (1 << 0),
-	QELR_DPM_FLAGS_LEGACY	= (1 << 1),
+	QELR_DPM_FLAGS_ENHANCED  = (1 << 0),
+	QELR_DPM_FLAGS_LEGACY	 = (1 << 1),
+	QELR_DPM_FLAGS_EDPM_MODE = (1 << 2),
 };
 
 struct qelr_devctx {
@@ -137,6 +138,7 @@ struct qelr_devctx {
 	enum qelr_dpm_flags	dpm_flags;
 	uint32_t		kernel_page_size;
 	uint16_t		ldpm_limit_size;
+	uint16_t		edpm_limit_size;
 	uint8_t			edpm_trans_size;
 
 	uint32_t		max_send_wr;
@@ -289,6 +291,7 @@ struct qelr_qp {
 	int					sq_sig_all;
 	int					atomic_supported;
 	uint8_t					edpm_disabled;
+	uint8_t					edpm_mode;
 	struct qelr_srq				*srq;
 };
 

providers/qedr/qelr_main.c

@@ -168,7 +168,7 @@ static struct verbs_context *qelr_alloc_context(struct ibv_device *ibdev,
 						void *private_data)
 {
 	struct qelr_devctx *ctx;
-	struct qelr_alloc_context cmd;
+	struct qelr_alloc_context cmd = {};
 	struct qelr_alloc_context_resp resp;
 
 	ctx = verbs_init_and_alloc_context(ibdev, cmd_fd, ctx, ibv_ctx,
@@ -181,7 +181,8 @@ static struct verbs_context *qelr_alloc_context(struct ibv_device *ibdev,
 	qelr_open_debug_file(ctx);
 	qelr_set_debug_mask();
 
-	cmd.context_flags = QEDR_ALLOC_UCTX_DB_REC;
+	cmd.context_flags = QEDR_ALLOC_UCTX_DB_REC | QEDR_SUPPORT_DPM_SIZES;
+	cmd.context_flags |= QEDR_ALLOC_UCTX_EDPM_MODE;
 	if (ibv_cmd_get_context(&ctx->ibv_ctx, &cmd.ibv_cmd, sizeof(cmd),
 				&resp.ibv_resp, sizeof(resp)))
 		goto cmd_err;
@@ -199,6 +200,9 @@ static struct verbs_context *qelr_alloc_context(struct ibv_device *ibdev,
 
 		if (resp.dpm_flags & QEDR_DPM_TYPE_ROCE_LEGACY)
 			ctx->dpm_flags |= QELR_DPM_FLAGS_LEGACY;
+
+		if (resp.dpm_flags & QEDR_DPM_TYPE_ROCE_EDPM_MODE)
+			ctx->dpm_flags |= QELR_DPM_FLAGS_EDPM_MODE;
 	} else {
 		if (resp.dpm_flags & QEDR_DPM_TYPE_IWARP_LEGACY)
 			ctx->dpm_flags = QELR_DPM_FLAGS_LEGACY;
@@ -208,9 +212,12 @@ static struct verbs_context *qelr_alloc_context(struct ibv_device *ibdev,
 	if (resp.dpm_flags & QEDR_DPM_SIZES_SET) {
 		ctx->ldpm_limit_size = resp.ldpm_limit_size;
 		ctx->edpm_trans_size = resp.edpm_trans_size;
+		ctx->edpm_limit_size = resp.edpm_limit_size ?
+			resp.edpm_limit_size : QEDR_EDPM_MAX_SIZE;
 	} else {
 		ctx->ldpm_limit_size = QEDR_LDPM_MAX_SIZE;
 		ctx->edpm_trans_size = QEDR_EDPM_TRANS_SIZE;
+		ctx->edpm_limit_size = QEDR_EDPM_MAX_SIZE;
 	}
 
 	ctx->max_send_wr = resp.max_send_wr;

providers/qedr/qelr_verbs.c

@@ -666,6 +666,8 @@ static inline int qelr_configure_qp(struct qelr_devctx *cxt, struct qelr_qp *qp,
 	qp->state = QELR_QPS_RST;
 	qp->sq_sig_all = attrs->sq_sig_all;
 	qp->atomic_supported = resp->atomic_supported;
+	if (cxt->dpm_flags & QELR_DPM_FLAGS_EDPM_MODE)
+		qp->edpm_mode = 1;
 
 	rc = qelr_configure_qp_sq(cxt, qp, attrs, resp);
 	if (rc)
@@ -1100,7 +1102,8 @@ static inline void qelr_init_dpm_info(struct qelr_devctx *cxt,
 
 	/* Check if edpm can be used */
 	if (wr->send_flags & IBV_SEND_INLINE && !qp->edpm_disabled &&
-	    cxt->dpm_flags & QELR_DPM_FLAGS_ENHANCED) {
+	    cxt->dpm_flags & QELR_DPM_FLAGS_ENHANCED &&
+	    data_size <= cxt->edpm_limit_size) {
 		memset(dpm, 0, sizeof(*dpm));
 		dpm->rdma_ext = (struct qelr_rdma_ext *)&dpm->payload;
 		dpm->is_edpm = 1;
@@ -1134,11 +1137,17 @@ static inline void qelr_edpm_set_msg_data(struct qelr_qp *qp,
 					  uint8_t comp)
 {
 	uint32_t wqe_size, dpm_size, params;
+	/* edpm mode - 0 : ack field is treated by old FW as "completion"
+	 * edpm mode - 1 : ack field is treated by new FW as ack which is
+	 * always required.
+	 */
+	uint8_t ack = (qp->edpm_mode) ? 1 : comp;
 
 	params = 0;
 	wqe_size = length + (QELR_IS_IMM_OR_INV(opcode) ? sizeof(uint32_t) : 0);
 	dpm_size = wqe_size + sizeof(struct db_roce_dpm_data);
 
+	SET_FIELD(params, DB_ROCE_DPM_PARAMS_ACK_REQUEST, ack);
 	SET_FIELD(params, DB_ROCE_DPM_PARAMS_DPM_TYPE, DPM_ROCE);
 	SET_FIELD(params, DB_ROCE_DPM_PARAMS_OPCODE, opcode);
 	SET_FIELD(params, DB_ROCE_DPM_PARAMS_WQE_SIZE, wqe_size);