soc_linux: force csr_data_width to 8-bit (required until we update th…

…e drivers).

soc_linux.py

@@ -103,6 +103,7 @@ class _SoCLinux(soc_cls):
         def __init__(self, cpu_variant="linux", uart_baudrate=1e6, **kwargs):
 
             # SoC ----------------------------------------------------------------------------------
+            kwargs["csr_data_width"] = 8
             soc_cls.__init__(self,
                 cpu_type       = "vexriscv",
                 cpu_variant    = cpu_variant,