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sim.py hangs after sched_clock init #186
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Passing a sys_clk_freq of 1MHz in the .dts was causing #186.
Passing a sys_clk_freq of 1MHz in the .dts was causing #186.
This was caused by the This should be fixed with: With this, here is the simulation log I get:
Can you try to reproduce the results @geertu? |
Confirmed, booting to userspace again. |
Thanks for the test @geertu. So the simulation is 260X slower than 100MHz, so runs at 384KHz, which is realistic here yes. |
LiteX simulation seems to be broken. It hangs after
Same result with the latest prebuilds and my own kernel .config. Works fine on OrangeCrab, though.
Palmer and Atish could use the simulator to investigate the L1_CACHE_SHIFT issue, cfr.
https://lore.kernel.org/linux-riscv/CAMuHMdXoJ9-jM4sazFbHXEsaDFFMK1ybM53SDqy_2QqPMZEQ=g@mail.gmail.com/
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