Userland+Tests: Add initial riscv64 support

Tests/Kernel/crash.cpp

@@ -210,6 +210,9 @@ int main(int argc, char** argv)
 #elif ARCH(AARCH64)
             (void)makeshift_esp;
             TODO_AARCH64();
+#elif ARCH(RISCV64)
+            (void)makeshift_esp;
+            TODO_RISCV64();
 #else
 #    error Unknown architecture
 #endif
@@ -226,6 +229,9 @@ int main(int argc, char** argv)
 #elif ARCH(AARCH64)
             (void)bad_esp;
             TODO_AARCH64();
+#elif ARCH(RISCV64)
+            (void)bad_esp;
+            TODO_RISCV64();
 #else
 #    error Unknown architecture
 #endif
@@ -247,6 +253,9 @@ int main(int argc, char** argv)
 #elif ARCH(AARCH64)
             (void)bad_esp;
             TODO_AARCH64();
+#elif ARCH(RISCV64)
+            (void)bad_esp;
+            TODO_RISCV64();
 #else
 #    error Unknown architecture
 #endif
@@ -290,6 +299,8 @@ int main(int argc, char** argv)
             asm volatile("str %eax");
 #elif ARCH(AARCH64)
             TODO_AARCH64();
+#elif ARCH(RISCV64)
+            TODO_RISCV64();
 #else
 #    error Unknown architecture
 #endif

Tests/Kernel/elf-symbolication-kernel-read-exploit.cpp

@@ -19,6 +19,10 @@ asm("haxcode:\n"
 asm("haxcode:\n"
     "1: b 1b\n"
     "haxcode_end:\n");
+#elif ARCH(RISCV64)
+asm("haxcode:\n"
+    "1: j 1b\n"
+    "haxcode_end:\n");
 #else
 #    error Unknown architecture
 #endif

Userland/Applications/CrashReporter/main.cpp

@@ -140,6 +140,12 @@ static TitleAndText build_cpu_registers(const ELF::Core::ThreadInfo& thread_info
     builder.appendff("x20={:p} x21={:p} x22={:p} x23={:p} x24={:p}\n", regs.x[20], regs.x[21], regs.x[22], regs.x[23], regs.x[24]);
     builder.appendff("x25={:p} x26={:p} x27={:p} x28={:p} x29={:p}\n", regs.x[25], regs.x[26], regs.x[27], regs.x[28], regs.x[29]);
     builder.appendff("x30={:p}", regs.x[30]);
+#elif ARCH(RISCV64)
+    builder.appendff("Program counter pc={:p}\n", regs.pc);
+    builder.appendff("ra={:p} sp={:p} gp={:p} tp={:p} fp={:p}\n", regs.x[0], regs.x[1], regs.x[2], regs.x[3], regs.x[7]);
+    builder.appendff("a0={:p} a1={:p} a2={:p} a3={:p} a4={:p} a5={:p} a6={:p} a7={:p}\n", regs.x[9], regs.x[10], regs.x[11], regs.x[12], regs.x[13], regs.x[14], regs.x[15], regs.x[16]);
+    builder.appendff("t0={:p} t1={:p} t2={:p} t3={:p} t4={:p} t5={:p} t6={:p}\n", regs.x[4], regs.x[5], regs.x[6], regs.x[27], regs.x[28], regs.x[29], regs.x[30]);
+    builder.appendff("s1={:p} s2={:p} s3={:p} s4={:p} s5={:p} s6={:p} s7={:p} s8={:p} s9={:p} s10={:p} s11={:p}\n", regs.x[8], regs.x[17], regs.x[18], regs.x[19], regs.x[20], regs.x[21], regs.x[22], regs.x[23], regs.x[24], regs.x[25], regs.x[26]);
 #else
 #    error Unknown architecture
 #endif

Userland/Applications/Debugger/main.cpp

@@ -48,6 +48,9 @@ static void handle_print_registers(PtraceRegisters const& regs)
 #elif ARCH(AARCH64)
     (void)regs;
     TODO_AARCH64();
+#elif ARCH(RISCV64)
+    (void)regs;
+    TODO_RISCV64();
 #else
 #    error Unknown architecture
 #endif
@@ -251,6 +254,9 @@ ErrorOr<int> serenity_main(Main::Arguments arguments)
 #elif ARCH(AARCH64)
         const FlatPtr ip = 0; // FIXME
         TODO_AARCH64();
+#elif ARCH(RISCV64)
+        const FlatPtr ip = 0; // FIXME
+        TODO_RISCV64();
 #else
 #    error Unknown architecture
 #endif

Userland/DevTools/HackStudio/Debugger/RegistersModel.cpp

@@ -40,6 +40,8 @@ RegistersModel::RegistersModel(PtraceRegisters const& regs)
     m_registers.append({ "gs", regs.gs });
 #elif ARCH(AARCH64)
     TODO_AARCH64();
+#elif ARCH(RISCV64)
+    TODO_RISCV64();
 #else
 #    error Unknown architecture
 #endif
@@ -76,6 +78,9 @@ RegistersModel::RegistersModel(PtraceRegisters const& current_regs, PtraceRegist
 #elif ARCH(AARCH64)
     (void)previous_regs;
     TODO_AARCH64();
+#elif ARCH(RISCV64)
+    (void)previous_regs;
+    TODO_RISCV64();
 #else
 #    error Unknown architecture
 #endif

Userland/DynamicLoader/main.cpp

@@ -73,10 +73,17 @@ NAKED void _start(int, char**, char**)
         "mov x29, 0\n"
         "mov x30, 0\n"
         "bl _entry\n");
-#else
+#elif ARCH(RISCV64)
+    asm(
+        "li fp, 0\n"
+        "li ra, 0\n"
+        "tail _entry@plt\n");
+#elif ARCH(X86_64)
     asm(
         "push $0\n"
         "jmp _entry@plt\n");
+#else
+#    error "Unknown architecture"
 #endif
 }
 

Userland/Libraries/LibC/arch/riscv64/setjmp.S

@@ -1 +1,20 @@
-# Intentionally empty.
+.global _setjmp
+.global setjmp
+_setjmp:
+setjmp:
+    # FIXME: Implement setjmp.
+    unimp
+
+.global _longjmp
+.global longjmp
+_longjmp:
+longjmp:
+    # FIXME: Implement longjmp.
+    unimp
+
+.global _sigsetjmp
+.global sigsetjmp
+_sigsetjmp:
+sigsetjmp:
+    # FIXME: Implement sigsetjmp.
+    unimp

Userland/Libraries/LibC/crt0.cpp

@@ -27,10 +27,17 @@ NAKED void _start(int, char**, char**)
         "mov x29, 0\n"
         "mov x30, 0\n"
         "bl _entry\n");
-#    else
+#    elif ARCH(RISCV64)
+    asm(
+        "li fp, 0\n"
+        "li ra, 0\n"
+        "tail _entry@plt\n");
+#    elif ARCH(X86_64)
     asm(
         "push $0\n"
         "jmp _entry@plt\n");
+#    else
+#        error "Unknown architecture"
 #    endif
 }
 

Userland/Libraries/LibC/fenv.cpp

@@ -10,7 +10,7 @@
 // This is the size of the floating point environment image in protected mode
 static_assert(sizeof(__x87_floating_point_environment) == 28);
 
-#if !ARCH(AARCH64)
+#if ARCH(X86_64)
 static u16 read_status_register()
 {
     u16 status_register;
@@ -58,11 +58,16 @@ int fegetenv(fenv_t* env)
 #if ARCH(AARCH64)
     (void)env;
     TODO_AARCH64();
-#else
+#elif ARCH(RISCV64)
+    (void)env;
+    TODO_RISCV64();
+#elif ARCH(X86_64)
     asm volatile("fnstenv %0"
                  : "=m"(env->__x87_fpu_env)::"memory");
 
     env->__mxcsr = read_mxcsr();
+#else
+#    error Unknown architecture
 #endif
 
     return 0;
@@ -76,7 +81,10 @@ int fesetenv(fenv_t const* env)
 #if ARCH(AARCH64)
     (void)env;
     TODO_AARCH64();
-#else
+#elif ARCH(RISCV64)
+    (void)env;
+    TODO_RISCV64();
+#elif ARCH(X86_64)
     if (env == FE_DFL_ENV) {
         asm volatile("finit");
         set_mxcsr(default_mxcsr_value);
@@ -87,6 +95,8 @@ int fesetenv(fenv_t const* env)
                  : "memory");
 
     set_mxcsr(env->__mxcsr);
+#else
+#    error Unknown architecture
 #endif
 
     return 0;
@@ -102,10 +112,15 @@ int feholdexcept(fenv_t* env)
 #if ARCH(AARCH64)
     (void)env;
     TODO_AARCH64();
-#else
+#elif ARCH(RISCV64)
+    (void)env;
+    TODO_RISCV64();
+#elif ARCH(X86_64)
     current_env.__x87_fpu_env.__status_word &= ~FE_ALL_EXCEPT;
     current_env.__x87_fpu_env.__status_word &= ~(1 << 7);      // Clear the "Exception Status Summary" bit
     current_env.__x87_fpu_env.__control_word &= FE_ALL_EXCEPT; // Masking these bits stops the corresponding exceptions from being generated according to the Intel Programmer's Manual
+#else
+#    error Unknown architecture
 #endif
 
     fesetenv(&current_env);
@@ -143,9 +158,15 @@ int fesetexceptflag(fexcept_t const* except, int exceptions)
     (void)exceptions;
     (void)except;
     TODO_AARCH64();
-#else
+#elif ARCH(RISCV64)
+    (void)exceptions;
+    (void)except;
+    TODO_RISCV64();
+#elif ARCH(X86_64)
     current_env.__x87_fpu_env.__status_word &= exceptions;
     current_env.__x87_fpu_env.__status_word &= ~(1 << 7); // Make sure exceptions don't get raised
+#else
+#    error Unknown architecture
 #endif
 
     fesetenv(&current_env);
@@ -156,9 +177,13 @@ int fegetround()
 {
 #if ARCH(AARCH64)
     TODO_AARCH64();
-#else
+#elif ARCH(RISCV64)
+    TODO_RISCV64();
+#elif ARCH(X86_64)
     // There's no way to signal whether the SSE rounding mode and x87 ones are different, so we assume they're the same
     return (read_status_register() >> 10) & 3;
+#else
+#    error Unknown architecture
 #endif
 }
 
@@ -169,7 +194,9 @@ int fesetround(int rounding_mode)
 
 #if ARCH(AARCH64)
     TODO_AARCH64();
-#else
+#elif ARCH(RISCV64)
+    TODO_RISCV64();
+#elif ARCH(X86_64)
     auto control_word = read_control_word();
 
     control_word &= ~(3 << 10);
@@ -183,7 +210,8 @@ int fesetround(int rounding_mode)
     mxcsr |= rounding_mode << 13;
 
     set_mxcsr(mxcsr);
-
+#else
+#    error Unknown architecture
 #endif
 
     return 0;
@@ -199,9 +227,14 @@ int feclearexcept(int exceptions)
 #if ARCH(AARCH64)
     (void)exceptions;
     TODO_AARCH64();
-#else
+#elif ARCH(RISCV64)
+    (void)exceptions;
+    TODO_RISCV64();
+#elif ARCH(X86_64)
     current_env.__x87_fpu_env.__status_word &= ~exceptions;
     current_env.__x87_fpu_env.__status_word &= ~(1 << 7); // Clear the "Exception Status Summary" bit
+#else
+#    error Unknown architecture
 #endif
 
     fesetenv(&current_env);
@@ -213,11 +246,16 @@ int fetestexcept(int exceptions)
 #if ARCH(AARCH64)
     (void)exceptions;
     TODO_AARCH64();
-#else
+#elif ARCH(RISCV64)
+    (void)exceptions;
+    TODO_RISCV64();
+#elif ARCH(X86_64)
     u16 status_register = read_status_register() & FE_ALL_EXCEPT;
     exceptions &= FE_ALL_EXCEPT;
 
     return status_register & exceptions;
+#else
+#    error Unknown architecture
 #endif
 }
 
@@ -231,7 +269,10 @@ int feraiseexcept(int exceptions)
 #if ARCH(AARCH64)
     (void)exceptions;
     TODO_AARCH64();
-#else
+#elif ARCH(RISCV64)
+    (void)exceptions;
+    TODO_RISCV64();
+#elif ARCH(X86_64)
     // While the order in which the exceptions is raised is unspecified, FE_OVERFLOW and FE_UNDERFLOW must be raised before FE_INEXACT, so handle that case in this branch
     if (exceptions & FE_INEXACT) {
         env.__x87_fpu_env.__status_word &= ((u16)exceptions & ~FE_INEXACT);
@@ -249,6 +290,8 @@ int feraiseexcept(int exceptions)
     env.__x87_fpu_env.__status_word &= exceptions;
     fesetenv(&env);
     asm volatile("fwait");
+#else
+#    error Unknown architecture
 #endif
 
     return 0;