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[WebAssembly] Rename atomic.notify and *.atomic.wait
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- atomic.notify -> memory.atomic.notify
- i32.atomic.wait -> memory.atomic.wait32
- i64.atomic.wait -> memory.atomic.wait64

See WebAssembly/threads#149.

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D91447
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aheejin authored and lorenzo chelini committed Nov 25, 2020
1 parent b5a4857 commit c3652f7
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Showing 11 changed files with 194 additions and 185 deletions.
6 changes: 3 additions & 3 deletions clang/include/clang/Basic/BuiltinsWebAssembly.def
Original file line number Diff line number Diff line change
Expand Up @@ -41,9 +41,9 @@ TARGET_BUILTIN(__builtin_wasm_throw, "vIUiv*", "r", "exception-handling")
TARGET_BUILTIN(__builtin_wasm_rethrow_in_catch, "v", "r", "exception-handling")

// Atomic wait and notify.
TARGET_BUILTIN(__builtin_wasm_atomic_wait_i32, "ii*iLLi", "n", "atomics")
TARGET_BUILTIN(__builtin_wasm_atomic_wait_i64, "iLLi*LLiLLi", "n", "atomics")
TARGET_BUILTIN(__builtin_wasm_atomic_notify, "Uii*Ui", "n", "atomics")
TARGET_BUILTIN(__builtin_wasm_memory_atomic_wait32, "ii*iLLi", "n", "atomics")
TARGET_BUILTIN(__builtin_wasm_memory_atomic_wait64, "iLLi*LLiLLi", "n", "atomics")
TARGET_BUILTIN(__builtin_wasm_memory_atomic_notify, "Uii*Ui", "n", "atomics")

// Trapping fp-to-int conversions
BUILTIN(__builtin_wasm_trunc_s_i32_f32, "if", "nc")
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12 changes: 6 additions & 6 deletions clang/lib/CodeGen/CGBuiltin.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -16425,24 +16425,24 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_rethrow_in_catch);
return Builder.CreateCall(Callee);
}
case WebAssembly::BI__builtin_wasm_atomic_wait_i32: {
case WebAssembly::BI__builtin_wasm_memory_atomic_wait32: {
Value *Addr = EmitScalarExpr(E->getArg(0));
Value *Expected = EmitScalarExpr(E->getArg(1));
Value *Timeout = EmitScalarExpr(E->getArg(2));
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_atomic_wait_i32);
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_memory_atomic_wait32);
return Builder.CreateCall(Callee, {Addr, Expected, Timeout});
}
case WebAssembly::BI__builtin_wasm_atomic_wait_i64: {
case WebAssembly::BI__builtin_wasm_memory_atomic_wait64: {
Value *Addr = EmitScalarExpr(E->getArg(0));
Value *Expected = EmitScalarExpr(E->getArg(1));
Value *Timeout = EmitScalarExpr(E->getArg(2));
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_atomic_wait_i64);
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_memory_atomic_wait64);
return Builder.CreateCall(Callee, {Addr, Expected, Timeout});
}
case WebAssembly::BI__builtin_wasm_atomic_notify: {
case WebAssembly::BI__builtin_wasm_memory_atomic_notify: {
Value *Addr = EmitScalarExpr(E->getArg(0));
Value *Count = EmitScalarExpr(E->getArg(1));
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_atomic_notify);
Function *Callee = CGM.getIntrinsic(Intrinsic::wasm_memory_atomic_notify);
return Builder.CreateCall(Callee, {Addr, Count});
}
case WebAssembly::BI__builtin_wasm_trunc_s_i32_f32:
Expand Down
24 changes: 12 additions & 12 deletions clang/test/CodeGen/builtins-wasm.c
Original file line number Diff line number Diff line change
Expand Up @@ -55,22 +55,22 @@ void rethrow_in_catch(void) {
// WEBASSEMBLY64: call void @llvm.wasm.rethrow.in.catch()
}

int atomic_wait_i32(int *addr, int expected, long long timeout) {
return __builtin_wasm_atomic_wait_i32(addr, expected, timeout);
// WEBASSEMBLY32: call i32 @llvm.wasm.atomic.wait.i32(i32* %{{.*}}, i32 %{{.*}}, i64 %{{.*}})
// WEBASSEMBLY64: call i32 @llvm.wasm.atomic.wait.i32(i32* %{{.*}}, i32 %{{.*}}, i64 %{{.*}})
int memory_atomic_wait32(int *addr, int expected, long long timeout) {
return __builtin_wasm_memory_atomic_wait32(addr, expected, timeout);
// WEBASSEMBLY32: call i32 @llvm.wasm.memory.atomic.wait32(i32* %{{.*}}, i32 %{{.*}}, i64 %{{.*}})
// WEBASSEMBLY64: call i32 @llvm.wasm.memory.atomic.wait32(i32* %{{.*}}, i32 %{{.*}}, i64 %{{.*}})
}

int atomic_wait_i64(long long *addr, long long expected, long long timeout) {
return __builtin_wasm_atomic_wait_i64(addr, expected, timeout);
// WEBASSEMBLY32: call i32 @llvm.wasm.atomic.wait.i64(i64* %{{.*}}, i64 %{{.*}}, i64 %{{.*}})
// WEBASSEMBLY64: call i32 @llvm.wasm.atomic.wait.i64(i64* %{{.*}}, i64 %{{.*}}, i64 %{{.*}})
int memory_atomic_wait64(long long *addr, long long expected, long long timeout) {
return __builtin_wasm_memory_atomic_wait64(addr, expected, timeout);
// WEBASSEMBLY32: call i32 @llvm.wasm.memory.atomic.wait64(i64* %{{.*}}, i64 %{{.*}}, i64 %{{.*}})
// WEBASSEMBLY64: call i32 @llvm.wasm.memory.atomic.wait64(i64* %{{.*}}, i64 %{{.*}}, i64 %{{.*}})
}

unsigned int atomic_notify(int *addr, unsigned int count) {
return __builtin_wasm_atomic_notify(addr, count);
// WEBASSEMBLY32: call i32 @llvm.wasm.atomic.notify(i32* %{{.*}}, i32 %{{.*}})
// WEBASSEMBLY64: call i32 @llvm.wasm.atomic.notify(i32* %{{.*}}, i32 %{{.*}})
unsigned int memory_atomic_notify(int *addr, unsigned int count) {
return __builtin_wasm_memory_atomic_notify(addr, count);
// WEBASSEMBLY32: call i32 @llvm.wasm.memory.atomic.notify(i32* %{{.*}}, i32 %{{.*}})
// WEBASSEMBLY64: call i32 @llvm.wasm.memory.atomic.notify(i32* %{{.*}}, i32 %{{.*}})
}

int trunc_s_i32_f32(float f) {
Expand Down
23 changes: 12 additions & 11 deletions llvm/include/llvm/IR/IntrinsicsWebAssembly.td
Original file line number Diff line number Diff line change
Expand Up @@ -79,22 +79,23 @@ def int_wasm_lsda : Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
//===----------------------------------------------------------------------===//

// wait / notify
def int_wasm_atomic_wait_i32 :
def int_wasm_memory_atomic_wait32 :
Intrinsic<[llvm_i32_ty],
[LLVMPointerType<llvm_i32_ty>, llvm_i32_ty, llvm_i64_ty],
[IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>, NoCapture<ArgIndex<0>>,
IntrHasSideEffects],
"", [SDNPMemOperand]>;
def int_wasm_atomic_wait_i64 :
[IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
NoCapture<ArgIndex<0>>, IntrHasSideEffects],
"", [SDNPMemOperand]>;
def int_wasm_memory_atomic_wait64 :
Intrinsic<[llvm_i32_ty],
[LLVMPointerType<llvm_i64_ty>, llvm_i64_ty, llvm_i64_ty],
[IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>, NoCapture<ArgIndex<0>>,
IntrHasSideEffects],
"", [SDNPMemOperand]>;
def int_wasm_atomic_notify:
[IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
NoCapture<ArgIndex<0>>, IntrHasSideEffects],
"", [SDNPMemOperand]>;
def int_wasm_memory_atomic_notify:
Intrinsic<[llvm_i32_ty], [LLVMPointerType<llvm_i32_ty>, llvm_i32_ty],
[IntrInaccessibleMemOnly, NoCapture<ArgIndex<0>>, IntrHasSideEffects], "",
[SDNPMemOperand]>;
[IntrInaccessibleMemOnly, NoCapture<ArgIndex<0>>,
IntrHasSideEffects],
"", [SDNPMemOperand]>;

//===----------------------------------------------------------------------===//
// SIMD intrinsics
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -249,8 +249,8 @@ inline unsigned GetDefaultP2AlignAny(unsigned Opc) {
WASM_LOAD_STORE(ATOMIC_RMW32_U_XCHG_I64)
WASM_LOAD_STORE(ATOMIC_RMW_CMPXCHG_I32)
WASM_LOAD_STORE(ATOMIC_RMW32_U_CMPXCHG_I64)
WASM_LOAD_STORE(ATOMIC_NOTIFY)
WASM_LOAD_STORE(ATOMIC_WAIT_I32)
WASM_LOAD_STORE(MEMORY_ATOMIC_NOTIFY)
WASM_LOAD_STORE(MEMORY_ATOMIC_WAIT32)
WASM_LOAD_STORE(LOAD_SPLAT_v32x4)
WASM_LOAD_STORE(LOAD_ZERO_v4i32)
WASM_LOAD_STORE(LOAD_LANE_v4i32)
Expand All @@ -269,7 +269,7 @@ inline unsigned GetDefaultP2AlignAny(unsigned Opc) {
WASM_LOAD_STORE(ATOMIC_RMW_XOR_I64)
WASM_LOAD_STORE(ATOMIC_RMW_XCHG_I64)
WASM_LOAD_STORE(ATOMIC_RMW_CMPXCHG_I64)
WASM_LOAD_STORE(ATOMIC_WAIT_I64)
WASM_LOAD_STORE(MEMORY_ATOMIC_WAIT64)
WASM_LOAD_STORE(LOAD_SPLAT_v64x2)
WASM_LOAD_STORE(LOAD_EXTEND_S_v8i16)
WASM_LOAD_STORE(LOAD_EXTEND_U_v8i16)
Expand Down
6 changes: 3 additions & 3 deletions llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -646,7 +646,7 @@ bool WebAssemblyTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
MachineFunction &MF,
unsigned Intrinsic) const {
switch (Intrinsic) {
case Intrinsic::wasm_atomic_notify:
case Intrinsic::wasm_memory_atomic_notify:
Info.opc = ISD::INTRINSIC_W_CHAIN;
Info.memVT = MVT::i32;
Info.ptrVal = I.getArgOperand(0);
Expand All @@ -660,15 +660,15 @@ bool WebAssemblyTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
// consistent. The same applies for wasm_atomic_wait intrinsics too.
Info.flags = MachineMemOperand::MOVolatile | MachineMemOperand::MOLoad;
return true;
case Intrinsic::wasm_atomic_wait_i32:
case Intrinsic::wasm_memory_atomic_wait32:
Info.opc = ISD::INTRINSIC_W_CHAIN;
Info.memVT = MVT::i32;
Info.ptrVal = I.getArgOperand(0);
Info.offset = 0;
Info.align = Align(4);
Info.flags = MachineMemOperand::MOVolatile | MachineMemOperand::MOLoad;
return true;
case Intrinsic::wasm_atomic_wait_i64:
case Intrinsic::wasm_memory_atomic_wait64:
Info.opc = ISD::INTRINSIC_W_CHAIN;
Info.memVT = MVT::i64;
Info.ptrVal = I.getArgOperand(0);
Expand Down
120 changes: 64 additions & 56 deletions llvm/lib/Target/WebAssembly/WebAssemblyInstrAtomics.td
Original file line number Diff line number Diff line change
Expand Up @@ -33,96 +33,98 @@ multiclass ATOMIC_NRI<dag oops, dag iops, list<dag> pattern, string asmstr = "",
//===----------------------------------------------------------------------===//

let hasSideEffects = 1 in {
defm ATOMIC_NOTIFY_A32 :
defm MEMORY_ATOMIC_NOTIFY_A32 :
ATOMIC_I<(outs I32:$dst),
(ins P2Align:$p2align, offset32_op:$off, I32:$addr, I32:$count),
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
"atomic.notify \t$dst, ${off}(${addr})${p2align}, $count",
"atomic.notify \t${off}${p2align}", 0x00, "false">;
defm ATOMIC_NOTIFY_A64 :
"memory.atomic.notify \t$dst, ${off}(${addr})${p2align}, $count",
"memory.atomic.notify \t${off}${p2align}", 0x00, "false">;
defm MEMORY_ATOMIC_NOTIFY_A64 :
ATOMIC_I<(outs I32:$dst),
(ins P2Align:$p2align, offset64_op:$off, I64:$addr, I32:$count),
(outs), (ins P2Align:$p2align, offset64_op:$off), [],
"atomic.notify \t$dst, ${off}(${addr})${p2align}, $count",
"atomic.notify \t${off}${p2align}", 0x00, "true">;
"memory.atomic.notify \t$dst, ${off}(${addr})${p2align}, $count",
"memory.atomic.notify \t${off}${p2align}", 0x00, "true">;
let mayLoad = 1 in {
defm ATOMIC_WAIT_I32_A32 :
defm MEMORY_ATOMIC_WAIT32_A32 :
ATOMIC_I<(outs I32:$dst),
(ins P2Align:$p2align, offset32_op:$off, I32:$addr, I32:$exp,
I64:$timeout),
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
"i32.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
"i32.atomic.wait \t${off}${p2align}", 0x01, "false">;
defm ATOMIC_WAIT_I32_A64 :
"memory.atomic.wait32 \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
"memory.atomic.wait32 \t${off}${p2align}", 0x01, "false">;
defm MEMORY_ATOMIC_WAIT32_A64 :
ATOMIC_I<(outs I32:$dst),
(ins P2Align:$p2align, offset64_op:$off, I64:$addr, I32:$exp,
I64:$timeout),
(outs), (ins P2Align:$p2align, offset64_op:$off), [],
"i32.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
"i32.atomic.wait \t${off}${p2align}", 0x01, "true">;
defm ATOMIC_WAIT_I64_A32 :
"memory.atomic.wait32 \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
"memory.atomic.wait32 \t${off}${p2align}", 0x01, "true">;
defm MEMORY_ATOMIC_WAIT64_A32 :
ATOMIC_I<(outs I32:$dst),
(ins P2Align:$p2align, offset32_op:$off, I32:$addr, I64:$exp,
I64:$timeout),
(outs), (ins P2Align:$p2align, offset32_op:$off), [],
"i64.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
"i64.atomic.wait \t${off}${p2align}", 0x02, "false">;
defm ATOMIC_WAIT_I64_A64 :
"memory.atomic.wait64 \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
"memory.atomic.wait64 \t${off}${p2align}", 0x02, "false">;
defm MEMORY_ATOMIC_WAIT64_A64 :
ATOMIC_I<(outs I32:$dst),
(ins P2Align:$p2align, offset64_op:$off, I64:$addr, I64:$exp,
I64:$timeout),
(outs), (ins P2Align:$p2align, offset64_op:$off), [],
"i64.atomic.wait \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
"i64.atomic.wait \t${off}${p2align}", 0x02, "true">;
"memory.atomic.wait64 \t$dst, ${off}(${addr})${p2align}, $exp, $timeout",
"memory.atomic.wait64 \t${off}${p2align}", 0x02, "true">;
} // mayLoad = 1
} // hasSideEffects = 1

let Predicates = [HasAtomics] in {
// Select notifys with no constant offset.
def NotifyPatNoOffset_A32 :
Pat<(i32 (int_wasm_atomic_notify I32:$addr, I32:$count)),
(ATOMIC_NOTIFY_A32 0, 0, I32:$addr, I32:$count)>,
Pat<(i32 (int_wasm_memory_atomic_notify I32:$addr, I32:$count)),
(MEMORY_ATOMIC_NOTIFY_A32 0, 0, I32:$addr, I32:$count)>,
Requires<[HasAddr32]>;
def NotifyPatNoOffset_A64 :
Pat<(i32 (int_wasm_atomic_notify I64:$addr, I32:$count)),
(ATOMIC_NOTIFY_A64 0, 0, I64:$addr, I32:$count)>,
Pat<(i32 (int_wasm_memory_atomic_notify I64:$addr, I32:$count)),
(MEMORY_ATOMIC_NOTIFY_A64 0, 0, I64:$addr, I32:$count)>,
Requires<[HasAddr64]>;

// Select notifys with a constant offset.

// Pattern with address + immediate offset
multiclass NotifyPatImmOff<PatFrag operand, string inst> {
def : Pat<(i32 (int_wasm_atomic_notify (operand I32:$addr, imm:$off),
def : Pat<(i32 (int_wasm_memory_atomic_notify (operand I32:$addr, imm:$off),
I32:$count)),
(!cast<NI>(inst#_A32) 0, imm:$off, I32:$addr, I32:$count)>,
Requires<[HasAddr32]>;
def : Pat<(i32 (int_wasm_atomic_notify (operand I64:$addr, imm:$off),
def : Pat<(i32 (int_wasm_memory_atomic_notify (operand I64:$addr, imm:$off),
I32:$count)),
(!cast<NI>(inst#_A64) 0, imm:$off, I64:$addr, I32:$count)>,
Requires<[HasAddr64]>;
}
defm : NotifyPatImmOff<regPlusImm, "ATOMIC_NOTIFY">;
defm : NotifyPatImmOff<or_is_add, "ATOMIC_NOTIFY">;
defm : NotifyPatImmOff<regPlusImm, "MEMORY_ATOMIC_NOTIFY">;
defm : NotifyPatImmOff<or_is_add, "MEMORY_ATOMIC_NOTIFY">;

// Select notifys with just a constant offset.
def NotifyPatOffsetOnly_A32 :
Pat<(i32 (int_wasm_atomic_notify imm:$off, I32:$count)),
(ATOMIC_NOTIFY_A32 0, imm:$off, (CONST_I32 0), I32:$count)>,
Pat<(i32 (int_wasm_memory_atomic_notify imm:$off, I32:$count)),
(MEMORY_ATOMIC_NOTIFY_A32 0, imm:$off, (CONST_I32 0), I32:$count)>,
Requires<[HasAddr32]>;
def NotifyPatOffsetOnly_A64 :
Pat<(i32 (int_wasm_atomic_notify imm:$off, I32:$count)),
(ATOMIC_NOTIFY_A64 0, imm:$off, (CONST_I64 0), I32:$count)>,
Pat<(i32 (int_wasm_memory_atomic_notify imm:$off, I32:$count)),
(MEMORY_ATOMIC_NOTIFY_A64 0, imm:$off, (CONST_I64 0), I32:$count)>,
Requires<[HasAddr64]>;

def NotifyPatGlobalAddrOffOnly_A32 :
Pat<(i32 (int_wasm_atomic_notify (WebAssemblywrapper tglobaladdr:$off),
I32:$count)),
(ATOMIC_NOTIFY_A32 0, tglobaladdr:$off, (CONST_I32 0), I32:$count)>,
Pat<(i32 (int_wasm_memory_atomic_notify (WebAssemblywrapper tglobaladdr:$off),
I32:$count)),
(MEMORY_ATOMIC_NOTIFY_A32 0, tglobaladdr:$off, (CONST_I32 0), I32:$count)
>,
Requires<[HasAddr32]>;
def NotifyPatGlobalAddrOffOnly_A64 :
Pat<(i32 (int_wasm_atomic_notify (WebAssemblywrapper tglobaladdr:$off),
I32:$count)),
(ATOMIC_NOTIFY_A64 0, tglobaladdr:$off, (CONST_I64 0), I32:$count)>,
Pat<(i32 (int_wasm_memory_atomic_notify (WebAssemblywrapper tglobaladdr:$off),
I32:$count)),
(MEMORY_ATOMIC_NOTIFY_A64 0, tglobaladdr:$off, (CONST_I64 0), I32:$count)
>,
Requires<[HasAddr64]>;

// Select waits with no constant offset.
Expand All @@ -135,10 +137,14 @@ multiclass WaitPatNoOffset<ValueType ty, Intrinsic kind,
(!cast<NI>(inst#_A64) 0, 0, I64:$addr, ty:$exp, I64:$timeout)>,
Requires<[HasAddr64]>;
}
defm : WaitPatNoOffset<i32, int_wasm_atomic_wait_i32, "ATOMIC_WAIT_I32">;
defm : WaitPatNoOffset<i64, int_wasm_atomic_wait_i64, "ATOMIC_WAIT_I64">;
defm : WaitPatNoOffset<i32, int_wasm_atomic_wait_i32, "ATOMIC_WAIT_I32">;
defm : WaitPatNoOffset<i64, int_wasm_atomic_wait_i64, "ATOMIC_WAIT_I64">;
defm : WaitPatNoOffset<i32, int_wasm_memory_atomic_wait32,
"MEMORY_ATOMIC_WAIT32">;
defm : WaitPatNoOffset<i64, int_wasm_memory_atomic_wait64,
"MEMORY_ATOMIC_WAIT64">;
defm : WaitPatNoOffset<i32, int_wasm_memory_atomic_wait32,
"MEMORY_ATOMIC_WAIT32">;
defm : WaitPatNoOffset<i64, int_wasm_memory_atomic_wait64,
"MEMORY_ATOMIC_WAIT64">;

// Select waits with a constant offset.

Expand All @@ -154,16 +160,16 @@ multiclass WaitPatImmOff<ValueType ty, Intrinsic kind, PatFrag operand,
I64:$timeout)>,
Requires<[HasAddr64]>;
}
defm : WaitPatImmOff<i32, int_wasm_atomic_wait_i32, regPlusImm,
"ATOMIC_WAIT_I32">;
defm : WaitPatImmOff<i32, int_wasm_atomic_wait_i32, or_is_add,
"ATOMIC_WAIT_I32">;
defm : WaitPatImmOff<i64, int_wasm_atomic_wait_i64, regPlusImm,
"ATOMIC_WAIT_I64">;
defm : WaitPatImmOff<i64, int_wasm_atomic_wait_i64, or_is_add,
"ATOMIC_WAIT_I64">;

// Select wait_i32, "ATOMIC_WAIT_I32s with just a constant offset.
defm : WaitPatImmOff<i32, int_wasm_memory_atomic_wait32, regPlusImm,
"MEMORY_ATOMIC_WAIT32">;
defm : WaitPatImmOff<i32, int_wasm_memory_atomic_wait32, or_is_add,
"MEMORY_ATOMIC_WAIT32">;
defm : WaitPatImmOff<i64, int_wasm_memory_atomic_wait64, regPlusImm,
"MEMORY_ATOMIC_WAIT64">;
defm : WaitPatImmOff<i64, int_wasm_memory_atomic_wait64, or_is_add,
"MEMORY_ATOMIC_WAIT64">;

// Select waits with just a constant offset.
multiclass WaitPatOffsetOnly<ValueType ty, Intrinsic kind, string inst> {
def : Pat<(i32 (kind imm:$off, ty:$exp, I64:$timeout)),
(!cast<NI>(inst#_A32) 0, imm:$off, (CONST_I32 0), ty:$exp,
Expand All @@ -174,8 +180,10 @@ multiclass WaitPatOffsetOnly<ValueType ty, Intrinsic kind, string inst> {
I64:$timeout)>,
Requires<[HasAddr64]>;
}
defm : WaitPatOffsetOnly<i32, int_wasm_atomic_wait_i32, "ATOMIC_WAIT_I32">;
defm : WaitPatOffsetOnly<i64, int_wasm_atomic_wait_i64, "ATOMIC_WAIT_I64">;
defm : WaitPatOffsetOnly<i32, int_wasm_memory_atomic_wait32,
"MEMORY_ATOMIC_WAIT32">;
defm : WaitPatOffsetOnly<i64, int_wasm_memory_atomic_wait64,
"MEMORY_ATOMIC_WAIT64">;

multiclass WaitPatGlobalAddrOffOnly<ValueType ty, Intrinsic kind, string inst> {
def : Pat<(i32 (kind (WebAssemblywrapper tglobaladdr:$off), ty:$exp,
Expand All @@ -189,10 +197,10 @@ multiclass WaitPatGlobalAddrOffOnly<ValueType ty, Intrinsic kind, string inst> {
I64:$timeout)>,
Requires<[HasAddr64]>;
}
defm : WaitPatGlobalAddrOffOnly<i32, int_wasm_atomic_wait_i32,
"ATOMIC_WAIT_I32">;
defm : WaitPatGlobalAddrOffOnly<i64, int_wasm_atomic_wait_i64,
"ATOMIC_WAIT_I64">;
defm : WaitPatGlobalAddrOffOnly<i32, int_wasm_memory_atomic_wait32,
"MEMORY_ATOMIC_WAIT32">;
defm : WaitPatGlobalAddrOffOnly<i64, int_wasm_memory_atomic_wait64,
"MEMORY_ATOMIC_WAIT64">;
} // Predicates = [HasAtomics]

//===----------------------------------------------------------------------===//
Expand Down
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