[FIRRTL] Since spec allows it, don't reject abstract reset on extmod.

llvm · Feb 21, 2024 · c10af05 · c10af05
1 parent aa9386a
commit c10af05
Showing 1 changed file with 5 additions and 3 deletions.
diff --git a/lib/Dialect/FIRRTL/FIRRTLOpInterfaces.cpp b/lib/Dialect/FIRRTL/FIRRTLOpInterfaces.cpp
@@ -130,17 +130,19 @@ LogicalResult circt::firrtl::verifyModuleLikeOpInterface(FModuleLike module) {
   if (failed(verifyNoInputProbes(module)))
     return failure();
 
-  // Enforce public module requirements.
+  // Enforce public and ext module requirements.
   if (module.isPublic() || isa<FExtModuleOp>(module)) {
     for (auto [idx, type] : llvm::enumerate(
              module.getPortTypesAttr().getAsValueRange<TypeAttr>())) {
       if (auto ftype = dyn_cast<FIRRTLType>(type)) {
         if (ftype.hasUninferredWidth())
           return emitError(module.getPortLocation(idx),
                            "public or ext module port must have known width");
-        if (ftype.hasUninferredReset())
+        // Presently abstract reset on extmodule is not explicitly disallowed in
+        // the FIRRTL spec.
+        if (ftype.hasUninferredReset() && !isa<FExtModuleOp>(module))
           return emitError(module.getPortLocation(idx),
-                           "public or ext module port must have concrete reset type");
+                           "public module port must have concrete reset type");
       }
     }
   }