[OM] Bypass constant ops referencing symbols in ExportVerilog
#5314
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mikeurbach
approved these changes
Jun 5, 2023
|
Nit: This bypasses all constant ops as they may reference symbols (as comment in the code says), it does not "bypass constant ops referencing symbols" as commit message suggests? Otherwise LGTM (can't speak for OM authoritatively but that's okay 👍) |
uenoku
reviewed
Jun 6, 2023
| @@ -5730,6 +5730,9 @@ void SharedEmitterState::gatherFiles(bool separateModules) { | |||
| .Case<om::ClassOp>([&](auto op) { | |||
| symbolCache.addDefinition(op.getSymNameAttr(), op); | |||
| }) | |||
| .Case<om::ConstantOp>([&](auto op) { | |||
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Just wondering, do we create arbitrary OM operations under the top-level operations? I'm not sure it's expected but if so, I think we might want to just accept all OM operations not only limited to constant.
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Fixes an issue with emission when symbols are used with
om.