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[CIR][CIRGen] Ensure proper tmp location for agg exprs (#320)
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This PR fixes a bug with wrong arguments passed into the call to
`buildAnyExpr`. This function has args with default values, hence the
bug occurred.
All the changes are even with the clang's original codegen.

For the reference, the LLVM IR code for `agg-init.cpp::usev()` function
looks like the following:
```
define dso_local void @_Z3usev() #0 {
entry:
  %agg.tmp.ensured = alloca %struct.yep_, align 4
  %Status = getelementptr inbounds %struct.yep_, ptr %agg.tmp.ensured, i32 0, i32 0
  store i32 0, ptr %Status, align 4
  %HC = getelementptr inbounds %struct.yep_, ptr %agg.tmp.ensured, i32 0, i32 1
  store i32 0, ptr %HC, align 4
  ret void
}
```
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gitoleg authored and lanza committed Jan 29, 2024
1 parent 58a1a2b commit 6373817
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Showing 4 changed files with 16 additions and 15 deletions.
2 changes: 1 addition & 1 deletion clang/lib/CIR/CodeGen/CIRGenExpr.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1209,7 +1209,7 @@ RValue CIRGenFunction::buildCall(clang::QualType CalleeType,
/// Emit code to compute the specified expression, ignoring the result.
void CIRGenFunction::buildIgnoredExpr(const Expr *E) {
if (E->isPRValue())
return (void)buildAnyExpr(E);
return (void)buildAnyExpr(E, AggValueSlot::ignored(), true);

// Just emit it as an l-value and drop the result.
buildLValue(E);
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13 changes: 7 additions & 6 deletions clang/lib/CIR/CodeGen/CIRGenExprAgg.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -43,9 +43,9 @@ class AggExprEmitter : public StmtVisitor<AggExprEmitter> {
void withReturnValueSlot(const Expr *E,
llvm::function_ref<RValue(ReturnValueSlot)> Fn);

AggValueSlot EnsureSlot(QualType T) {
assert(!Dest.isIgnored() && "ignored slots NYI");
return Dest;
AggValueSlot EnsureSlot(mlir::Location loc, QualType T) {
if (!Dest.isIgnored()) return Dest;
return CGF.CreateAggTemp(T, loc, "agg.tmp.ensured");
}

void EnsureDest(mlir::Location loc, QualType T) {
Expand Down Expand Up @@ -501,7 +501,7 @@ void AggExprEmitter::VisitMaterializeTemporaryExpr(
}

void AggExprEmitter::VisitCXXConstructExpr(const CXXConstructExpr *E) {
AggValueSlot Slot = EnsureSlot(E->getType());
AggValueSlot Slot = EnsureSlot(CGF.getLoc(E->getSourceRange()), E->getType());
CGF.buildCXXConstructExpr(E, Slot);
}

Expand All @@ -523,7 +523,7 @@ void AggExprEmitter::VisitExprWithCleanups(ExprWithCleanups *E) {

void AggExprEmitter::VisitLambdaExpr(LambdaExpr *E) {
CIRGenFunction::SourceLocRAIIObject loc{CGF, CGF.getLoc(E->getSourceRange())};
AggValueSlot Slot = EnsureSlot(E->getType());
AggValueSlot Slot = EnsureSlot(CGF.getLoc(E->getSourceRange()), E->getType());
LLVM_ATTRIBUTE_UNUSED LValue SlotLV =
CGF.makeAddrLValue(Slot.getAddress(), E->getType());

Expand Down Expand Up @@ -751,7 +751,8 @@ void AggExprEmitter::VisitCXXParenListOrInitListExpr(
}
#endif

AggValueSlot Dest = EnsureSlot(ExprToVisit->getType());
AggValueSlot Dest = EnsureSlot(CGF.getLoc(ExprToVisit->getSourceRange()),
ExprToVisit->getType());

LValue DestLV = CGF.makeAddrLValue(Dest.getAddress(), ExprToVisit->getType());

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2 changes: 1 addition & 1 deletion clang/test/CIR/CodeGen/agg-init.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ typedef struct yep_ {
void use() { yop{}; }

// CHECK: cir.func @_Z3usev()
// CHECK: %0 = cir.alloca !ty_22yep_22, cir.ptr <!ty_22yep_22>, ["agg.tmp0"] {alignment = 4 : i64}
// CHECK: %0 = cir.alloca !ty_22yep_22, cir.ptr <!ty_22yep_22>, ["agg.tmp.ensured"] {alignment = 4 : i64}
// CHECK: %1 = cir.get_member %0[0] {name = "Status"} : !cir.ptr<!ty_22yep_22> -> !cir.ptr<!u32i>
// CHECK: %2 = cir.const(#cir.int<0> : !u32i) : !u32i
// CHECK: cir.store %2, %1 : !u32i, cir.ptr <!u32i>
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14 changes: 7 additions & 7 deletions clang/test/CIR/CodeGen/vtable-rtti.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -47,14 +47,14 @@ class B : public A
// foo - zero initialize object B and call ctor (@B::B())
//
// CHECK: cir.func @_Z3foov()
// CHECK: %0 = cir.alloca ![[ClassB]], cir.ptr <![[ClassB]]>, ["agg.tmp0"] {alignment = 8 : i64}
// CHECK: cir.scope {
// CHECK: %1 = cir.const(#cir.zero : ![[ClassB]]) : ![[ClassB]]
// CHECK: cir.store %1, %0 : ![[ClassB]], cir.ptr <![[ClassB]]>
// CHECK: cir.call @_ZN1BC2Ev(%0) : (!cir.ptr<![[ClassB]]>) -> ()
// CHECK: }
// CHECK: cir.return
// CHECK: cir.scope {
// CHECK: %0 = cir.alloca !ty_22B22, cir.ptr <!ty_22B22>, ["agg.tmp.ensured"] {alignment = 8 : i64}
// CHECK: %1 = cir.const(#cir.zero : ![[ClassB]]) : ![[ClassB]]
// CHECK: cir.store %1, %0 : ![[ClassB]], cir.ptr <![[ClassB]]>
// CHECK: cir.call @_ZN1BC2Ev(%0) : (!cir.ptr<![[ClassB]]>) -> ()
// CHECK: }
// CHECK: cir.return
// CHECK: }

// Vtable definition for A
// CHECK: cir.global "private" external @_ZTV1A : ![[VTableTypeA]] {alignment = 8 : i64}
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