Revert "[SROA] Check typeSizeEqualsStoreSize in isVectorPromotionViable"

This reverts commit 3f08d24. The commit this change is fixing is being reverted due to GHI #57796 and #37821, so revert this commit as well.
llvm · Sep 23, 2022 · 0a7f4e0 · 0a7f4e0
1 parent 0ba2a3c
commit 0a7f4e0
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diff --git a/llvm/lib/Transforms/Scalar/SROA.cpp b/llvm/lib/Transforms/Scalar/SROA.cpp
@@ -1933,8 +1933,6 @@ static VectorType *isVectorPromotionViable(Partition &P, const DataLayout &DL) {
       continue;
     if (isa<VectorType>(Ty))
       continue;
-    if (!DL.typeSizeEqualsStoreSize(Ty))
-      continue;
     // Create Vector with size of V, and each element of type Ty
     VectorType *V = CandidateTys[0];
     uint64_t ElementSize = DL.getTypeStoreSizeInBits(Ty).getFixedSize();

diff --git a/llvm/test/Transforms/SROA/vector-promotion.ll b/llvm/test/Transforms/SROA/vector-promotion.ll
@@ -628,19 +628,3 @@ entry:
   %add2 = add i32 %add, %add1
   ret i32 %add2
 }
-
-; This used to hit an assert after commit de3445e0ef15c4.
-; Added as regression test to verify that we handle this without crashing.
-define i1 @test15() {
-; CHECK-LABEL: @test15(
-; CHECK-NEXT:    [[A_SROA_0:%.*]] = alloca <2 x i64>, align 32
-; CHECK-NEXT:    store <2 x i64> <i64 0, i64 -1>, ptr [[A_SROA_0]], align 32
-; CHECK-NEXT:    [[A_SROA_0_0_A_SROA_0_0_L:%.*]] = load i1, ptr [[A_SROA_0]], align 32
-; CHECK-NEXT:    ret i1 [[A_SROA_0_0_A_SROA_0_0_L]]
-;
-  %a = alloca <8 x i32>
-  store <2 x i64> <i64 0, i64 -1>, ptr %a
-  %l = load i1, ptr %a, align 1
-  ret i1 %l
-
-}