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[LoopUnswitch] Properly update MSSA if header has non-clobbering stores.
This patch fixes updating MemorySSA if the header contains memory defs that do not clobber a duplicated instruction. We need to find the first defining access outside the loop body and use that as defining access of the duplicated instruction. This fixes a crash caused by bee4868.
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76 changes: 76 additions & 0 deletions
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llvm/test/Transforms/LoopUnswitch/partial-unswitch-update-memoryssa.ll
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; RUN: opt -loop-unswitch -verify-dom-info -verify-memoryssa -S -enable-new-pm=0 %s | FileCheck %s | ||
; RUN: opt -loop-unswitch -memssa-check-limit=3 -verify-dom-info -verify-memoryssa -S -enable-new-pm=0 %s | FileCheck %s | ||
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declare void @clobber() | ||
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; Check that MemorySSA updating can deal with a clobbering access of a | ||
; duplicated load being a MemoryPHI outside the loop. | ||
define void @partial_unswitch_memssa_update(i32* noalias %ptr, i1 %c) { | ||
; CHECK-LABEL: @partial_unswitch_memssa_update( | ||
; CHECK-LABEL: loop.ph: | ||
; CHECK-NEXT: [[LV:%[a-z0-9]+]] = load i32, i32* %ptr, align 4 | ||
; CHECK-NEXT: [[C:%[a-z0-9]+]] = icmp eq i32 [[LV]], 0 | ||
; CHECK-NEXT: br i1 [[C]] | ||
entry: | ||
br i1 %c, label %loop.ph, label %outside.clobber | ||
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outside.clobber: | ||
call void @clobber() | ||
br label %loop.ph | ||
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loop.ph: | ||
br label %loop.header | ||
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loop.header: | ||
%lv = load i32, i32* %ptr, align 4 | ||
%hc = icmp eq i32 %lv, 0 | ||
br i1 %hc, label %if, label %then | ||
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if: | ||
br label %loop.latch | ||
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then: | ||
br label %loop.latch | ||
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loop.latch: | ||
br i1 true, label %loop.header, label %exit | ||
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exit: | ||
ret void | ||
} | ||
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; Check that MemorySSA updating can deal with skipping defining accesses in the | ||
; loop body until it finds the first defining access outside the loop. | ||
define void @partial_unswitch_inloop_stores_beteween_outside_defining_access(i64* noalias %ptr, i16* noalias %src) { | ||
; CHECK-LABEL: @partial_unswitch_inloop_stores_beteween_outside_defining_access | ||
; CHECK-LABEL: entry: | ||
; CHECK-NEXT: store i64 0, i64* %ptr, align 1 | ||
; CHECK-NEXT: store i64 1, i64* %ptr, align 1 | ||
; CHECK-NEXT: [[LV:%[a-z0-9]+]] = load i16, i16* %src, align 1 | ||
; CHECK-NEXT: [[C:%[a-z0-9]+]] = icmp eq i16 [[LV]], 0 | ||
; CHECK-NEXT: br i1 [[C]] | ||
; | ||
entry: | ||
store i64 0, i64* %ptr, align 1 | ||
store i64 1, i64* %ptr, align 1 | ||
br label %loop | ||
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loop: | ||
%iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ] | ||
store i64 2, i64* %ptr, align 1 | ||
%lv = load i16, i16* %src, align 1 | ||
%invar.cond = icmp eq i16 %lv, 0 | ||
br i1 %invar.cond, label %noclobber, label %loop.latch | ||
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noclobber: | ||
br label %loop.latch | ||
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loop.latch: | ||
%iv.next = add i32 %iv, 1 | ||
%ec = icmp eq i32 %iv, 1000 | ||
br i1 %ec, label %exit, label %loop | ||
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exit: | ||
ret void | ||
} | ||
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