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[M68k][TableGen](1/8) TableGen related changes
- Add a new TableGen backend: CodeBeads - Add support to generate logical operand information For the first item, it is currently a workaround of M68k's (complex) instruction encoding. A typical architecture, especially CISC one like X86, normally uses `MCInstrDesc::TSFlags` to carry instruction encoding info. However, at the early days of M68k backend development, we found it difficult to fit every possible encoding into the 64-bit `MCInstrDesc::TSFlags`. Therefore CodeBeads was invented to provide an alternative, arbitrary length container for instruciton encoding info. However, in the long term we incline not to use a new TG backend for less common pattern like what we encountered in M68k. A bug has been created to host to discussion on migrating from CodeBeads to more concise solution: https://bugs.llvm.org/show_bug.cgi?id=48792 The second item was also served for similar purpose. It created utility functions that tell you the index of a `MachineOperand` in a `MachineInst` given a logical operand index. In normal cases a logical operand is the same as `MachineOperand`, but for operands using complex addressing mode a logical operand might be consisting of multiple `MachineOperand`. The TableGen-ed `getLogicalOperandIdx`, for instance, can give you the mapping between these two concepts. Nevertheless, we hope to remove this feature in the future if possible. Since it's not really useful for the targets supported by LLVM now either. Authors: myhsu, m4yers, glaubitz Differential Revision: https://reviews.llvm.org/D88385
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,137 @@ | ||
| //===---------- CodeBeadsGen.cpp - Code Beads Generator -------------------===// | ||
| // | ||
| // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
| // See https://llvm.org/LICENSE.txt for license information. | ||
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
| // | ||
| //===----------------------------------------------------------------------===// | ||
| // CodeBeads are data fields carrying auxiliary information for instructions. | ||
| // | ||
| // Under the hood it's simply implemented by a `bits` field (with arbitrary | ||
| // length) in each TG instruction description, where this TG backend will | ||
| // generate a helper function to access it. | ||
| // | ||
| // This is especially useful for expressing variable length encoding | ||
| // instructions and complex addressing modes. Since in those cases each | ||
| // instruction is usually associated with large amount of information like | ||
| // addressing mode details used on a specific operand. Instead of retreating to | ||
| // ad-hoc methods to figure out these information when encoding an instruction, | ||
| // CodeBeads provide a clean table for the instruction encoder to lookup. | ||
| //===----------------------------------------------------------------------===// | ||
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| #include "CodeGenTarget.h" | ||
| #include "llvm/ADT/StringExtras.h" | ||
| #include "llvm/Support/Debug.h" | ||
| #include "llvm/TableGen/Error.h" | ||
| #include "llvm/TableGen/Record.h" | ||
| #include "llvm/TableGen/TableGenBackend.h" | ||
| #include <map> | ||
| #include <string> | ||
| #include <vector> | ||
| using namespace llvm; | ||
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| namespace { | ||
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| class CodeBeadsGen { | ||
| RecordKeeper &Records; | ||
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| public: | ||
| CodeBeadsGen(RecordKeeper &R) : Records(R) {} | ||
| void run(raw_ostream &OS); | ||
| }; | ||
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| void CodeBeadsGen::run(raw_ostream &OS) { | ||
| CodeGenTarget Target(Records); | ||
| std::vector<Record *> Insts = Records.getAllDerivedDefinitions("Instruction"); | ||
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| // For little-endian instruction bit encodings, reverse the bit order | ||
| Target.reverseBitsForLittleEndianEncoding(); | ||
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| ArrayRef<const CodeGenInstruction *> NumberedInstructions = | ||
| Target.getInstructionsByEnumValue(); | ||
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| // Emit function declaration | ||
| OS << "const uint8_t *llvm::" << Target.getInstNamespace(); | ||
| OS << "::getMCInstrBeads(unsigned Opcode) {\n"; | ||
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| // First, get the maximum bit length among all beads. And do some | ||
| // simple validation | ||
| unsigned MaxBitLength = 0; | ||
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| for (const CodeGenInstruction *CGI : NumberedInstructions) { | ||
| Record *R = CGI->TheDef; | ||
| if (!R->getValue("Beads")) | ||
| continue; | ||
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| BitsInit *BI = R->getValueAsBitsInit("Beads"); | ||
| if (!BI->isComplete()) { | ||
| PrintFatalError(R->getLoc(), "Record `" + R->getName() + | ||
| "', bit field 'Beads' is not complete"); | ||
| } | ||
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| MaxBitLength = std::max(MaxBitLength, BI->getNumBits()); | ||
| } | ||
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| // Number of bytes | ||
| unsigned Parts = MaxBitLength / 8; | ||
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| // Emit instruction base values | ||
| OS << " static const uint8_t InstBits[][" << Parts << "] = {\n"; | ||
| for (const CodeGenInstruction *CGI : NumberedInstructions) { | ||
| Record *R = CGI->TheDef; | ||
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| if (R->getValueAsString("Namespace") == "TargetOpcode" || | ||
| !R->getValue("Beads")) { | ||
| OS << "\t{ 0x0 },\t// "; | ||
| if (R->getValueAsBit("isPseudo")) | ||
| OS << "(Pseudo) "; | ||
| OS << R->getName() << "\n"; | ||
| continue; | ||
| } | ||
|
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| BitsInit *BI = R->getValueAsBitsInit("Beads"); | ||
|
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| // Convert to byte array: | ||
| // [dcba] -> [a][b][c][d] | ||
| OS << "\t{"; | ||
| for (unsigned p = 0; p < Parts; ++p) { | ||
| unsigned Right = 8 * p; | ||
| unsigned Left = Right + 8; | ||
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| uint8_t Value = 0; | ||
| for (unsigned i = Right; i != Left; ++i) { | ||
| unsigned Shift = i % 8; | ||
| if (auto *B = dyn_cast<BitInit>(BI->getBit(i))) { | ||
| Value |= (static_cast<uint8_t>(B->getValue()) << Shift); | ||
| } else { | ||
| PrintFatalError(R->getLoc(), "Record `" + R->getName() + | ||
| "', bit 'Beads[" + Twine(i) + | ||
| "]' is not defined"); | ||
| } | ||
| } | ||
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| if (p) | ||
| OS << ','; | ||
| OS << " 0x"; | ||
| OS.write_hex(Value); | ||
| OS << ""; | ||
| } | ||
| OS << " }," << '\t' << "// " << R->getName() << "\n"; | ||
| } | ||
| OS << "\t{ 0x0 }\n };\n"; | ||
|
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| // Emit initial function code | ||
| OS << " return InstBits[Opcode];\n" | ||
| << "}\n\n"; | ||
| } | ||
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| } // End anonymous namespace | ||
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| namespace llvm { | ||
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| void EmitCodeBeads(RecordKeeper &RK, raw_ostream &OS) { | ||
| emitSourceFileHeader("Machine Code Beads", OS); | ||
| CodeBeadsGen(RK).run(OS); | ||
| } | ||
|
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| } // namespace llvm |
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