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[MCInstrDesc] [TableGen] Reduce size of MCOperandInfo instances.
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Differential Revision: https://reviews.llvm.org/D93326
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Paul C. Anagnostopoulos committed Dec 22, 2020
1 parent bef9eb8 commit 5b37f0d
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Showing 2 changed files with 22 additions and 14 deletions.
31 changes: 20 additions & 11 deletions llvm/include/llvm/MC/MCInstrDesc.h
Original file line number Diff line number Diff line change
Expand Up @@ -27,12 +27,22 @@ class MCInst;
//===----------------------------------------------------------------------===//

namespace MCOI {
// Operand constraints
/// Operand constraints. These are encoded in 16 bits with one of the
/// low-order 3 bits specifying that a constraint is present and the
/// corresponding high-order hex digit specifying the constraint value.
/// This allows for a maximum of 3 constraints.
enum OperandConstraint {
TIED_TO = 0, // Must be allocated the same register as.
EARLY_CLOBBER // Operand is an early clobber register operand
TIED_TO = 0, // Must be allocated the same register as specified value.
EARLY_CLOBBER // If present, operand is an early clobber register.
};

// Define a macro to produce each constraint value.
#define MCOI_TIED_TO(op) \
((1 << MCOI::TIED_TO) | ((op) << (4 + MCOI::TIED_TO * 4)))

#define MCOI_EARLY_CLOBBER \
(1 << MCOI::EARLY_CLOBBER)

/// These are flags set on operands, but should be considered
/// private, all access should go through the MCOperandInfo accessors.
/// See the accessors for a description of what these are.
Expand Down Expand Up @@ -84,10 +94,9 @@ class MCOperandInfo {

/// Information about the type of the operand.
uint8_t OperandType;
/// The lower 16 bits are used to specify which constraints are set.
/// The higher 16 bits are used to specify the value of constraints (4 bits
/// each).
uint32_t Constraints;

/// Operand constraints (see OperandConstraint enum).
uint16_t Constraints;

/// Set if this operand is a pointer value and it requires a callback
/// to look up its register class.
Expand Down Expand Up @@ -197,14 +206,14 @@ class MCInstrDesc {
const MCPhysReg *ImplicitDefs; // Registers implicitly defined by this instr
const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands

/// Returns the value of the specific constraint if
/// it is set. Returns -1 if it is not set.
/// Returns the value of the specified operand constraint if
/// it is present. Returns -1 if it is not present.
int getOperandConstraint(unsigned OpNum,
MCOI::OperandConstraint Constraint) const {
if (OpNum < NumOperands &&
(OpInfo[OpNum].Constraints & (1 << Constraint))) {
unsigned Pos = 16 + Constraint * 4;
return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf;
unsigned ValuePos = 4 + Constraint * 4;
return (int)(OpInfo[OpNum].Constraints >> ValuePos) & 0x0f;
}
return -1;
}
Expand Down
5 changes: 2 additions & 3 deletions llvm/utils/TableGen/InstrInfoEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -182,11 +182,10 @@ InstrInfoEmitter::GetOperandInfo(const CodeGenInstruction &Inst) {
if (Constraint.isNone())
Res += "0";
else if (Constraint.isEarlyClobber())
Res += "(1 << MCOI::EARLY_CLOBBER)";
Res += "MCOI_EARLY_CLOBBER";
else {
assert(Constraint.isTied());
Res += "((" + utostr(Constraint.getTiedOperand()) +
" << 16) | (1 << MCOI::TIED_TO))";
Res += "MCOI_TIED_TO(" + utostr(Constraint.getTiedOperand()) + ")";
}

Result.push_back(Res);
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