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[AMDGPU] Pre-commit global-isel test case for D106451
This test case shows the scheduler wrongly reordering two buffer accesses that might alias.
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; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN %s | ||
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; FIXME: the first load and store should not be reordered because they might | ||
; alias depending on the value of %off | ||
; GCN-LABEL: {{^}}test1: | ||
; GCN: buffer_load_dword | ||
; GCN: buffer_store_dword | ||
; GCN: buffer_store_dword | ||
define amdgpu_cs void @test1(<4 x i32> inreg %buf, i32 %off) { | ||
.entry: | ||
call void @llvm.amdgcn.raw.buffer.store.i32(i32 0, <4 x i32> %buf, i32 8, i32 0, i32 0) | ||
%val = call i32 @llvm.amdgcn.raw.buffer.load.i32(<4 x i32> %buf, i32 %off, i32 0, i32 0) | ||
call void @llvm.amdgcn.raw.buffer.store.i32(i32 %val, <4 x i32> %buf, i32 0, i32 0, i32 0) | ||
ret void | ||
} | ||
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declare i32 @llvm.amdgcn.raw.buffer.load.i32(<4 x i32>, i32, i32, i32) #2 | ||
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declare void @llvm.amdgcn.raw.buffer.store.i32(i32, <4 x i32>, i32, i32, i32) #3 | ||
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attributes #2 = { nounwind readonly } | ||
attributes #3 = { nounwind writeonly } |