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[AArch64] Remove superfluous sxtw in peephole opt (#96293)
Across a basic-block we might have in i32 extract from a value that only operates on upper bits (for example a sxtw). We can replace the COPY with a new version skipping the sxtw.
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,46 @@ | ||
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py | ||
# RUN: llc -run-pass=aarch64-mi-peephole-opt -o - -mtriple=aarch64-unknown-linux -verify-machineinstrs %s | FileCheck %s | ||
|
||
--- | ||
name: removeSxtw | ||
tracksRegLiveness: true | ||
body: | | ||
bb.0.entry: | ||
liveins: $x0 | ||
; CHECK-LABEL: name: removeSxtw | ||
; CHECK: liveins: $x0 | ||
; CHECK-NEXT: {{ $}} | ||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0 | ||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32sp = COPY [[COPY]].sub_32 | ||
; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[COPY1]], 1, 0 | ||
; CHECK-NEXT: $w0 = COPY [[ADDWri]] | ||
; CHECK-NEXT: RET_ReallyLR implicit $w0 | ||
%0:gpr64 = COPY $x0 | ||
%1:gpr64 = SBFMXri %0:gpr64, 0, 31 | ||
%2:gpr32sp = COPY %1.sub_32:gpr64 | ||
%3:gpr32sp = ADDWri %2:gpr32sp, 1, 0 | ||
$w0 = COPY %3:gpr32sp | ||
RET_ReallyLR implicit $w0 | ||
... | ||
--- | ||
name: extraCopy | ||
tracksRegLiveness: true | ||
body: | | ||
bb.0.entry: | ||
liveins: $x0 | ||
; CHECK-LABEL: name: extraCopy | ||
; CHECK: liveins: $x0 | ||
; CHECK-NEXT: {{ $}} | ||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0 | ||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32sp = COPY [[COPY]].sub_32 | ||
; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32sp = ADDWri [[COPY1]], 1, 0 | ||
; CHECK-NEXT: $w0 = COPY [[ADDWri]] | ||
; CHECK-NEXT: RET_ReallyLR implicit $w0 | ||
%0:gpr64 = COPY $x0 | ||
%1:gpr64 = SBFMXri %0:gpr64, 0, 31 | ||
%2:gpr64all = COPY %1:gpr64 | ||
%3:gpr32sp = COPY %2.sub_32:gpr64all | ||
%4:gpr32sp = ADDWri %3:gpr32sp, 1, 0 | ||
$w0 = COPY %4:gpr32sp | ||
RET_ReallyLR implicit $w0 | ||
... |
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