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MIR Serialization: Serialize machine instruction names.
This commit implements initial machine instruction serialization. It serializes machine instruction names. The instructions are represented using a YAML sequence of string literals and are a part of machine basic block YAML mapping. This commit introduces a class called 'MIParser' which will be used to parse the machine instructions and operands. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10481 llvm-svn: 240295
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add_llvm_library(LLVMMIRParser | ||
MIParser.cpp | ||
MIRParser.cpp | ||
) | ||
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//===- MIParser.cpp - Machine instructions parser implementation ----------===// | ||
// | ||
// The LLVM Compiler Infrastructure | ||
// | ||
// This file is distributed under the University of Illinois Open Source | ||
// License. See LICENSE.TXT for details. | ||
// | ||
//===----------------------------------------------------------------------===// | ||
// | ||
// This file implements the parsing of machine instructions. | ||
// | ||
//===----------------------------------------------------------------------===// | ||
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#include "MIParser.h" | ||
#include "llvm/ADT/StringMap.h" | ||
#include "llvm/CodeGen/MachineBasicBlock.h" | ||
#include "llvm/CodeGen/MachineFunction.h" | ||
#include "llvm/CodeGen/MachineInstr.h" | ||
#include "llvm/Support/raw_ostream.h" | ||
#include "llvm/Support/SourceMgr.h" | ||
#include "llvm/Target/TargetSubtargetInfo.h" | ||
#include "llvm/Target/TargetInstrInfo.h" | ||
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using namespace llvm; | ||
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namespace { | ||
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class MIParser { | ||
SourceMgr &SM; | ||
MachineFunction &MF; | ||
SMDiagnostic &Error; | ||
StringRef Source; | ||
/// Maps from instruction names to op codes. | ||
StringMap<unsigned> Names2InstrOpCodes; | ||
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public: | ||
MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error, | ||
StringRef Source); | ||
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/// Report an error at the current location with the given message. | ||
/// | ||
/// This function always return true. | ||
bool error(const Twine &Msg); | ||
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MachineInstr *parse(); | ||
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private: | ||
void initNames2InstrOpCodes(); | ||
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/// Try to convert an instruction name to an opcode. Return true if the | ||
/// instruction name is invalid. | ||
bool parseInstrName(StringRef InstrName, unsigned &OpCode); | ||
}; | ||
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} // end anonymous namespace | ||
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MIParser::MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error, | ||
StringRef Source) | ||
: SM(SM), MF(MF), Error(Error), Source(Source) {} | ||
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bool MIParser::error(const Twine &Msg) { | ||
// TODO: Get the proper location in the MIR file, not just a location inside | ||
// the string. | ||
Error = | ||
SMDiagnostic(SM, SMLoc(), SM.getMemoryBuffer(SM.getMainFileID()) | ||
->getBufferIdentifier(), | ||
1, 0, SourceMgr::DK_Error, Msg.str(), Source, None, None); | ||
return true; | ||
} | ||
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MachineInstr *MIParser::parse() { | ||
StringRef InstrName = Source; | ||
unsigned OpCode; | ||
if (parseInstrName(InstrName, OpCode)) { | ||
error(Twine("unknown machine instruction name '") + InstrName + "'"); | ||
return nullptr; | ||
} | ||
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// TODO: Parse the rest of instruction - machine operands, etc. | ||
const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode); | ||
auto *MI = MF.CreateMachineInstr(MCID, DebugLoc()); | ||
return MI; | ||
} | ||
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void MIParser::initNames2InstrOpCodes() { | ||
if (!Names2InstrOpCodes.empty()) | ||
return; | ||
const auto *TII = MF.getSubtarget().getInstrInfo(); | ||
assert(TII && "Expected target instruction info"); | ||
for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I) | ||
Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I)); | ||
} | ||
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bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) { | ||
initNames2InstrOpCodes(); | ||
auto InstrInfo = Names2InstrOpCodes.find(InstrName); | ||
if (InstrInfo == Names2InstrOpCodes.end()) | ||
return true; | ||
OpCode = InstrInfo->getValue(); | ||
return false; | ||
} | ||
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MachineInstr *llvm::parseMachineInstr(SourceMgr &SM, MachineFunction &MF, | ||
StringRef Src, SMDiagnostic &Error) { | ||
return MIParser(SM, MF, Error, Src).parse(); | ||
} |
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//===- MIParser.h - Machine Instructions Parser ---------------------------===// | ||
// | ||
// The LLVM Compiler Infrastructure | ||
// | ||
// This file is distributed under the University of Illinois Open Source | ||
// License. See LICENSE.TXT for details. | ||
// | ||
//===----------------------------------------------------------------------===// | ||
// | ||
// This file declares the function that parses the machine instructions. | ||
// | ||
//===----------------------------------------------------------------------===// | ||
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#ifndef LLVM_LIB_CODEGEN_MIRPARSER_MIPARSER_H | ||
#define LLVM_LIB_CODEGEN_MIRPARSER_MIPARSER_H | ||
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#include "llvm/ADT/StringRef.h" | ||
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namespace llvm { | ||
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class MachineInstr; | ||
class MachineFunction; | ||
class SMDiagnostic; | ||
class SourceMgr; | ||
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MachineInstr *parseMachineInstr(SourceMgr &SM, MachineFunction &MF, | ||
StringRef Src, SMDiagnostic &Error); | ||
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} // end namespace llvm | ||
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#endif |
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if not 'X86' in config.root.targets: | ||
config.unsupported = True |
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# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s | ||
# This test ensures that the MIR parser parses X86 machine instructions | ||
# correctly. | ||
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--- | | ||
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define i32 @inc(i32 %a) { | ||
entry: | ||
%b = mul i32 %a, 11 | ||
ret i32 %b | ||
} | ||
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... | ||
--- | ||
# CHECK: name: inc | ||
name: inc | ||
body: | ||
- name: entry | ||
instructions: | ||
# CHECK: - IMUL32rri8 | ||
# CHECK-NEXT: - RETQ | ||
- IMUL32rri8 | ||
- RETQ | ||
... |
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# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s | ||
# This test ensures that an error is reported when an unknown instruction is | ||
# encountered. | ||
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--- | | ||
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define i32 @foo() { | ||
entry: | ||
ret i32 0 | ||
} | ||
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... | ||
--- | ||
name: foo | ||
body: | ||
- name: entry | ||
instructions: | ||
# CHECK: 1:1: unknown machine instruction name 'retJust0' | ||
- retJust0 | ||
... |