Revert "[RISCV] Temporarily move riscv-expand-pseudo pass to PreEmitP…

…ass2" This reverts commit 05a20a9.
llvm · Jul 1, 2020 · a61fa1a · a61fa1a
1 parent 1276855
commit a61fa1a
Showing 1 changed file with 1 addition and 2 deletions.
diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
@@ -168,12 +168,11 @@ bool RISCVPassConfig::addGlobalInstructionSelect() {
   return false;
 }
 
-void RISCVPassConfig::addPreSched2() { }
+void RISCVPassConfig::addPreSched2() { addPass(createRISCVExpandPseudoPass()); }
 
 void RISCVPassConfig::addPreEmitPass() { addPass(&BranchRelaxationPassID); }
 
 void RISCVPassConfig::addPreEmitPass2() {
-  addPass(createRISCVExpandPseudoPass());
   // Schedule the expansion of AMOs at the last possible moment, avoiding the
   // possibility for other passes to break the requirements for forward
   // progress in the LR/SC block.