[RISCV][NFC] Cleanup SCR1 sched model (#96088)

Related to #95948
llvm · Jun 20, 2024 · d4bfc4a · d4bfc4a
1 parent e3eb12c
commit d4bfc4a
Showing 1 changed file with 0 additions and 2 deletions.
diff --git a/llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td b/llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td
@@ -101,8 +101,6 @@ def : ReadAdvance<ReadIRem, 0>;
 def : ReadAdvance<ReadIRem32, 0>;
 def : ReadAdvance<ReadIMul, 0>;
 def : ReadAdvance<ReadIMul32, 0>;
-def : ReadAdvance<ReadSFBJmp, 0>;
-def : ReadAdvance<ReadSFBALU, 0>;
 
 //===----------------------------------------------------------------------===//
 // Unsupported extensions