[AMDGPU] Fixed subreg use in sdwa-scalar-ops.mir. NFC

llvm · Feb 11, 2020 · d538dc0 · d538dc0
1 parent 99c5bcb
commit d538dc0
Showing 1 changed file with 10 additions and 10 deletions.
diff --git a/llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir b/llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir
@@ -219,31 +219,31 @@ body:             |
     %13 = COPY %7.sub1
     %14 = S_ADD_U32 %7.sub0, %0.sub0, implicit-def $scc
     %15 = S_ADDC_U32 %7.sub1, %0.sub1, implicit-def dead $scc, implicit $scc
-    %16 = REG_SEQUENCE %14, 1, %15, 2
+    %16 = REG_SEQUENCE %14, %subreg.sub0, %15, %subreg.sub1
     %18 = COPY %16
     %17 = FLAT_LOAD_DWORD %18, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %ir.uglygep45)
     %60 = V_BFE_U32 %17, 8, 8, implicit $exec
     %61 = V_LSHLREV_B32_e32 2, killed %60, implicit $exec
     %70 = V_ADD_I32_e32 %7.sub0, %61, implicit-def $vcc, implicit $exec
     %66 = COPY %13
     %65 = V_ADDC_U32_e32 0, %66, implicit-def $vcc, implicit $vcc, implicit $exec
-    %67 = REG_SEQUENCE %70, 1, killed %65, 2
+    %67 = REG_SEQUENCE %70, %subreg.sub0, killed %65, %subreg.sub1
     FLAT_STORE_DWORD %67, %30, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %ir.tmp9)
     %37 = S_ADD_U32 %14, 4, implicit-def $scc
     %38 = S_ADDC_U32 %15, 0, implicit-def dead $scc, implicit $scc
     %71 = COPY killed %37
     %72 = COPY killed %38
-    %41 = REG_SEQUENCE killed %71, 1, killed %72, 2
+    %41 = REG_SEQUENCE killed %71, %subreg.sub0, killed %72, %subreg.sub1
     %40 = FLAT_LOAD_DWORD killed %41, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %ir.scevgep)
     %73 = V_BFE_U32 %40, 8, 8, implicit $exec
     %74 = V_LSHLREV_B32_e32 2, killed %73, implicit $exec
     %83 = V_ADD_I32_e32 %7.sub0, %74, implicit-def $vcc, implicit $exec
     %78 = V_ADDC_U32_e32 0, %66, implicit-def $vcc, implicit $vcc, implicit $exec
-    %80 = REG_SEQUENCE %83, 1, killed %78, 2
+    %80 = REG_SEQUENCE %83, %subreg.sub0, killed %78, %subreg.sub1
     FLAT_STORE_DWORD %80, %30, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %ir.tmp17)
     %55 = S_ADD_U32 %0.sub0, 8, implicit-def $scc
     %56 = S_ADDC_U32 %0.sub1, 0, implicit-def dead $scc, implicit $scc
-    %57 = REG_SEQUENCE %55, 1, killed %56, 2
+    %57 = REG_SEQUENCE %55, %subreg.sub0, killed %56, %subreg.sub1
     %1 = COPY %57
     S_CMPK_EQ_I32 %55, 4096, implicit-def $scc
     S_CBRANCH_SCC1 %bb.1.bb1, implicit $scc
@@ -382,31 +382,31 @@ body:             |
     %13 = COPY %7.sub1
     %14 = S_ADD_U32 %7.sub0, %0.sub0, implicit-def $scc
     %15 = S_ADDC_U32 %7.sub1, %0.sub1, implicit-def dead $scc, implicit $scc
-    %16 = REG_SEQUENCE %14, 1, %15, 2
+    %16 = REG_SEQUENCE %14, %subreg.sub0, %15, %subreg.sub1
     %18 = COPY %16
     %17 = FLAT_LOAD_DWORD %18, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %ir.uglygep45)
     %60 = V_BFE_U32 %17, 8, 8, implicit $exec
     %61 = V_LSHLREV_B32_e32 %84, killed %60, implicit $exec
     %70 = V_ADD_I32_e32 %7.sub0, %61, implicit-def $vcc, implicit $exec
     %66 = COPY %13
     %65 = V_ADDC_U32_e32 0, %66, implicit-def $vcc, implicit $vcc, implicit $exec
-    %67 = REG_SEQUENCE %70, 1, killed %65, 2
+    %67 = REG_SEQUENCE %70, %subreg.sub0, killed %65, %subreg.sub1
     FLAT_STORE_DWORD %67, %30, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %ir.tmp9)
     %37 = S_ADD_U32 %14, 4, implicit-def $scc
     %38 = S_ADDC_U32 %15, 0, implicit-def dead $scc, implicit $scc
     %71 = COPY killed %37
     %72 = COPY killed %38
-    %41 = REG_SEQUENCE killed %71, 1, killed %72, 2
+    %41 = REG_SEQUENCE killed %71, %subreg.sub0, killed %72, %subreg.sub1
     %40 = FLAT_LOAD_DWORD killed %41, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4 from %ir.scevgep)
     %73 = V_BFE_U32 %40, 8, 8, implicit $exec
     %74 = V_LSHLREV_B32_e32 %84, killed %73, implicit $exec
     %83 = V_ADD_I32_e32 %7.sub0, %74, implicit-def $vcc, implicit $exec
     %78 = V_ADDC_U32_e32 0, %66, implicit-def $vcc, implicit $vcc, implicit $exec
-    %80 = REG_SEQUENCE %83, 1, killed %78, 2
+    %80 = REG_SEQUENCE %83, %subreg.sub0, killed %78, %subreg.sub1
     FLAT_STORE_DWORD %80, %30, 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4 into %ir.tmp17)
     %55 = S_ADD_U32 %0.sub0, 8, implicit-def $scc
     %56 = S_ADDC_U32 %0.sub1, 0, implicit-def dead $scc, implicit $scc
-    %57 = REG_SEQUENCE %55, 1, killed %56, 2
+    %57 = REG_SEQUENCE %55, %subreg.sub0, killed %56, %subreg.sub1
     %1 = COPY %57
     S_CMPK_EQ_I32 %55, 4096, implicit-def $scc
     S_CBRANCH_SCC1 %bb.1.bb1, implicit $scc