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[PowerPC] Fix SELECT_CC with i64 operand on PPC32
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This patch fixes the infinite loop in legalization of PPC32 SELECT_CC
with 64-bit operand.
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ecnelises committed Apr 28, 2021
1 parent b622df3 commit d5c2492
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Showing 2 changed files with 64 additions and 1 deletion.
2 changes: 1 addition & 1 deletion llvm/lib/Target/PowerPC/PPCISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1219,7 +1219,7 @@ PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM,

// We need to handle f128 SELECT_CC with integer result type.
setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
setOperationAction(ISD::SELECT_CC, MVT::i64, Custom);
setOperationAction(ISD::SELECT_CC, MVT::i64, isPPC64 ? Custom : Expand);
}

if (Subtarget.hasP9Altivec()) {
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63 changes: 63 additions & 0 deletions llvm/test/CodeGen/PowerPC/ppc32-selectcc-i64.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,63 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc -mcpu=pwr7 < %s | FileCheck %s

; This piece of IR is expanded from memcmp.
define i1 @cmp(i8* %a, i8* %b) {
; CHECK-LABEL: cmp:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lwz 5, 4(3)
; CHECK-NEXT: lwz 7, 0(3)
; CHECK-NEXT: lwz 6, 4(4)
; CHECK-NEXT: lwz 8, 0(4)
; CHECK-NEXT: xor 9, 7, 8
; CHECK-NEXT: xor 10, 5, 6
; CHECK-NEXT: or. 9, 10, 9
; CHECK-NEXT: bne 0, .LBB0_2
; CHECK-NEXT: # %bb.1: # %loadbb1
; CHECK-NEXT: lbz 3, 8(3)
; CHECK-NEXT: lbz 4, 8(4)
; CHECK-NEXT: sub 3, 3, 4
; CHECK-NEXT: srwi 3, 3, 31
; CHECK-NEXT: blr
; CHECK-NEXT: .LBB0_2: # %res_block
; CHECK-NEXT: cmplw 7, 8
; CHECK-NEXT: cmplw 1, 5, 6
; CHECK-NEXT: li 3, 1
; CHECK-NEXT: li 4, -1
; CHECK-NEXT: crandc 20, 0, 2
; CHECK-NEXT: crand 21, 2, 4
; CHECK-NEXT: cror 20, 21, 20
; CHECK-NEXT: isel 3, 4, 3, 20
; CHECK-NEXT: srwi 3, 3, 31
; CHECK-NEXT: blr
entry:
br label %loadbb

res_block:
%0 = icmp ult i64 %4, %5
%1 = select i1 %0, i32 -1, i32 1
br label %endblock

loadbb:
%2 = bitcast i8* %a to i64*
%3 = bitcast i8* %b to i64*
%4 = load i64, i64* %2, align 1
%5 = load i64, i64* %3, align 1
%6 = icmp eq i64 %4, %5
br i1 %6, label %loadbb1, label %res_block

loadbb1:
%7 = getelementptr i8, i8* %a, i64 8
%8 = getelementptr i8, i8* %b, i64 8
%9 = load i8, i8* %7, align 1
%10 = load i8, i8* %8, align 1
%11 = zext i8 %9 to i32
%12 = zext i8 %10 to i32
%13 = sub i32 %11, %12
br label %endblock

endblock:
%phi.res = phi i32 [ %13, %loadbb1 ], [ %1, %res_block ]
%icmp = icmp slt i32 %phi.res, 0
ret i1 %icmp
}

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