Skip to content

Commit

Permalink
[RISCV] Add test cases for failure to optimize select_cc with X < 1 o…
Browse files Browse the repository at this point in the history
…r X > -1. NFC

We can use BGE with X0 to implement these, but we currently put
1 or -1 into a register.
  • Loading branch information
topperc committed Mar 12, 2021
1 parent 61f006a commit d701e37
Showing 1 changed file with 36 additions and 9 deletions.
45 changes: 36 additions & 9 deletions llvm/test/CodeGen/RISCV/select-cc.ll
Original file line number Diff line number Diff line change
Expand Up @@ -52,11 +52,23 @@ define i32 @foo(i32 %a, i32 *%b) nounwind {
; RV32I-NEXT: # %bb.17:
; RV32I-NEXT: mv a0, a2
; RV32I-NEXT: .LBB0_18:
; RV32I-NEXT: lw a1, 0(a1)
; RV32I-NEXT: bge a1, a0, .LBB0_20
; RV32I-NEXT: lw a2, 0(a1)
; RV32I-NEXT: bge a2, a0, .LBB0_20
; RV32I-NEXT: # %bb.19:
; RV32I-NEXT: mv a0, a1
; RV32I-NEXT: mv a0, a2
; RV32I-NEXT: .LBB0_20:
; RV32I-NEXT: lw a2, 0(a1)
; RV32I-NEXT: addi a3, zero, 1
; RV32I-NEXT: blt a2, a3, .LBB0_22
; RV32I-NEXT: # %bb.21:
; RV32I-NEXT: mv a0, a2
; RV32I-NEXT: .LBB0_22:
; RV32I-NEXT: lw a1, 0(a1)
; RV32I-NEXT: addi a3, zero, -1
; RV32I-NEXT: blt a3, a2, .LBB0_24
; RV32I-NEXT: # %bb.23:
; RV32I-NEXT: mv a0, a1
; RV32I-NEXT: .LBB0_24:
; RV32I-NEXT: ret
;
; RV32IBT-LABEL: foo:
Expand Down Expand Up @@ -85,12 +97,19 @@ define i32 @foo(i32 %a, i32 *%b) nounwind {
; RV32IBT-NEXT: cmov a0, a4, a0, a2
; RV32IBT-NEXT: lw a2, 0(a1)
; RV32IBT-NEXT: slt a4, a0, a3
; RV32IBT-NEXT: lw a1, 0(a1)
; RV32IBT-NEXT: cmov a0, a4, a3, a0
; RV32IBT-NEXT: slt a3, a0, a2
; RV32IBT-NEXT: cmov a0, a3, a0, a2
; RV32IBT-NEXT: slt a2, a1, a0
; RV32IBT-NEXT: cmov a0, a2, a1, a0
; RV32IBT-NEXT: lw a3, 0(a1)
; RV32IBT-NEXT: slt a4, a0, a2
; RV32IBT-NEXT: lw a5, 0(a1)
; RV32IBT-NEXT: cmov a0, a4, a0, a2
; RV32IBT-NEXT: slt a2, a3, a0
; RV32IBT-NEXT: cmov a0, a2, a3, a0
; RV32IBT-NEXT: slti a2, a5, 1
; RV32IBT-NEXT: lw a1, 0(a1)
; RV32IBT-NEXT: cmov a0, a2, a0, a5
; RV32IBT-NEXT: addi a2, zero, -1
; RV32IBT-NEXT: slt a2, a2, a5
; RV32IBT-NEXT: cmov a0, a2, a0, a1
; RV32IBT-NEXT: ret
%val1 = load volatile i32, i32* %b
%tst1 = icmp eq i32 %a, %val1
Expand Down Expand Up @@ -132,5 +151,13 @@ define i32 @foo(i32 %a, i32 *%b) nounwind {
%tst10 = icmp sle i32 %val18, %val19
%val20 = select i1 %tst10, i32 %val18, i32 %val19

ret i32 %val20
%val21 = load volatile i32, i32* %b
%tst11 = icmp slt i32 %val21, 1
%val22 = select i1 %tst11, i32 %val20, i32 %val21

%val23 = load volatile i32, i32* %b
%tst12 = icmp sgt i32 %val21, -1
%val24 = select i1 %tst12, i32 %val22, i32 %val23

ret i32 %val24
}

0 comments on commit d701e37

Please sign in to comment.