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[WebAssembly] Fix multiclass template parameter types. NFC.
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Fixes TableGen parser errors reported by D95874 due to incompatible types being used on multiclass templates.

Differential Revision: https://reviews.llvm.org/D96205
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@RKSimon
RKSimon committed Feb 8, 2021
1 parent 6039f82 commit db5abfb
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Showing 3 changed files with 23 additions and 22 deletions.
4 changes: 2 additions & 2 deletions llvm/lib/Target/WebAssembly/WebAssemblyInstrAtomics.td
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Original file line number Diff line number Diff line change
Expand Up @@ -607,7 +607,7 @@ multiclass BinRMWPatOffsetOnly<ValueType ty, PatFrag kind, string inst> {
Requires<[HasAddr64, HasAtomics]>;
}

multiclass BinRMWPatGlobalAddrOffOnly<ValueType ty, PatFrag kind, NI inst> {
multiclass BinRMWPatGlobalAddrOffOnly<ValueType ty, PatFrag kind, string inst> {
def : Pat<(ty (kind (WebAssemblywrapper tglobaladdr:$off), ty:$val)),
(!cast<NI>(inst#_A32) 0, tglobaladdr:$off, (CONST_I32 0), ty:$val)>,
Requires<[HasAddr32, HasAtomics, IsNotPIC]>;
Expand Down Expand Up @@ -685,7 +685,7 @@ class sext_bin_rmw_16_64<PatFrag kind> : sext_bin_rmw_8_64<kind>;
// Patterns for various addressing modes for truncating-extending binary RMWs.
multiclass BinRMWTruncExtPattern<
PatFrag rmw_8, PatFrag rmw_16, PatFrag rmw_32, PatFrag rmw_64,
NI inst8_32, NI inst16_32, NI inst8_64, NI inst16_64, NI inst32_64> {
string inst8_32, string inst16_32, string inst8_64, string inst16_64, string inst32_64> {
// Truncating-extending binary RMWs with no constant offset
defm : BinRMWPatNoOffset<i32, zext_bin_rmw_8_32<rmw_8>, inst8_32>;
defm : BinRMWPatNoOffset<i32, zext_bin_rmw_16_32<rmw_16>, inst16_32>;
Expand Down
8 changes: 4 additions & 4 deletions llvm/lib/Target/WebAssembly/WebAssemblyInstrMemory.td
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Original file line number Diff line number Diff line change
Expand Up @@ -67,7 +67,7 @@ defm LOAD_F32 : WebAssemblyLoad<F32, "f32.load", 0x2a, []>;
defm LOAD_F64 : WebAssemblyLoad<F64, "f64.load", 0x2b, []>;

// Select loads with no constant offset.
multiclass LoadPatNoOffset<ValueType ty, PatFrag kind, string inst> {
multiclass LoadPatNoOffset<ValueType ty, SDPatternOperator kind, string inst> {
def : Pat<(ty (kind I32:$addr)), (!cast<NI>(inst # "_A32") 0, 0, I32:$addr)>,
Requires<[HasAddr32]>;
def : Pat<(ty (kind (i64 I64:$addr))), (!cast<NI>(inst # "_A64") 0, 0, I64:$addr)>,
Expand All @@ -82,7 +82,7 @@ defm : LoadPatNoOffset<f64, load, "LOAD_F64">;
// Select loads with a constant offset.

// Pattern with address + immediate offset
multiclass LoadPatImmOff<ValueType ty, PatFrag kind, PatFrag operand,
multiclass LoadPatImmOff<ValueType ty, SDPatternOperator kind, PatFrag operand,
string inst> {
def : Pat<(ty (kind (operand I32:$addr, imm:$off))),
(!cast<NI>(inst # "_A32") 0, imm:$off, I32:$addr)>,
Expand All @@ -102,7 +102,7 @@ defm : LoadPatImmOff<f32, load, or_is_add, "LOAD_F32">;
defm : LoadPatImmOff<f64, load, or_is_add, "LOAD_F64">;

// Select loads with just a constant offset.
multiclass LoadPatOffsetOnly<ValueType ty, PatFrag kind, string inst> {
multiclass LoadPatOffsetOnly<ValueType ty, SDPatternOperator kind, string inst> {
def : Pat<(ty (kind imm:$off)),
(!cast<NI>(inst # "_A32") 0, imm:$off, (CONST_I32 0))>,
Requires<[HasAddr32]>;
Expand All @@ -116,7 +116,7 @@ defm : LoadPatOffsetOnly<i64, load, "LOAD_I64">;
defm : LoadPatOffsetOnly<f32, load, "LOAD_F32">;
defm : LoadPatOffsetOnly<f64, load, "LOAD_F64">;

multiclass LoadPatGlobalAddrOffOnly<ValueType ty, PatFrag kind, string inst> {
multiclass LoadPatGlobalAddrOffOnly<ValueType ty, SDPatternOperator kind, string inst> {
def : Pat<(ty (kind (WebAssemblywrapper tglobaladdr:$off))),
(!cast<NI>(inst # "_A32") 0, tglobaladdr:$off, (CONST_I32 0))>,
Requires<[IsNotPIC, HasAddr32]>;
Expand Down
33 changes: 17 additions & 16 deletions llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
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Original file line number Diff line number Diff line change
Expand Up @@ -308,7 +308,7 @@ defm "" : SIMDLoadLane<I32x4, 90>;
defm "" : SIMDLoadLane<I64x2, 91>;

// Select loads with no constant offset.
multiclass LoadLanePatNoOffset<Vec vec, PatFrag kind> {
multiclass LoadLanePatNoOffset<Vec vec, SDPatternOperator kind> {
defvar load_lane_a32 = !cast<NI>("LOAD_LANE_"#vec#"_A32");
defvar load_lane_a64 = !cast<NI>("LOAD_LANE_"#vec#"_A64");
def : Pat<(vec.vt (kind (i32 I32:$addr),
Expand Down Expand Up @@ -381,7 +381,7 @@ defm "" : SIMDStoreLane<I32x4, 94>;
defm "" : SIMDStoreLane<I64x2, 95>;

// Select stores with no constant offset.
multiclass StoreLanePatNoOffset<Vec vec, PatFrag kind> {
multiclass StoreLanePatNoOffset<Vec vec, Intrinsic kind> {
def : Pat<(kind (i32 I32:$addr), (vec.vt V128:$vec), (i32 vec.lane_idx:$idx)),
(!cast<NI>("STORE_LANE_"#vec#"_A32") 0, 0, imm:$idx, $addr, $vec)>,
Requires<[HasAddr32]>;
Expand Down Expand Up @@ -705,7 +705,7 @@ defm EQ_v2i64 :
// Bitwise operations
//===----------------------------------------------------------------------===//

multiclass SIMDBinary<Vec vec, SDNode node, string name, bits<32> simdop> {
multiclass SIMDBinary<Vec vec, SDPatternOperator node, string name, bits<32> simdop> {
defm _#vec : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
(outs), (ins),
[(set (vec.vt V128:$dst),
Expand All @@ -714,7 +714,8 @@ multiclass SIMDBinary<Vec vec, SDNode node, string name, bits<32> simdop> {
vec.prefix#"."#name, simdop>;
}

multiclass SIMDBitwise<SDNode node, string name, bits<32> simdop, bit commutable = false> {
multiclass SIMDBitwise<SDPatternOperator node, string name, bits<32> simdop,
bit commutable = false> {
let isCommutable = commutable in
defm "" : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
(outs), (ins), [],
Expand All @@ -724,7 +725,7 @@ multiclass SIMDBitwise<SDNode node, string name, bits<32> simdop, bit commutable
(!cast<NI>(NAME) $lhs, $rhs)>;
}

multiclass SIMDUnary<Vec vec, SDNode node, string name, bits<32> simdop> {
multiclass SIMDUnary<Vec vec, SDPatternOperator node, string name, bits<32> simdop> {
defm _#vec : SIMD_I<(outs V128:$dst), (ins V128:$v), (outs), (ins),
[(set (vec.vt V128:$dst),
(vec.vt (node (vec.vt V128:$v))))],
Expand Down Expand Up @@ -811,21 +812,21 @@ defm : SIMDSignSelect<I64x2, 148>;
// Integer unary arithmetic
//===----------------------------------------------------------------------===//

multiclass SIMDUnaryInt<SDNode node, string name, bits<32> baseInst> {
multiclass SIMDUnaryInt<SDPatternOperator node, string name, bits<32> baseInst> {
defm "" : SIMDUnary<I8x16, node, name, baseInst>;
defm "" : SIMDUnary<I16x8, node, name, !add(baseInst, 32)>;
defm "" : SIMDUnary<I32x4, node, name, !add(baseInst, 64)>;
defm "" : SIMDUnary<I64x2, node, name, !add(baseInst, 96)>;
}

multiclass SIMDReduceVec<Vec vec, SDNode op, string name, bits<32> simdop> {
multiclass SIMDReduceVec<Vec vec, SDPatternOperator op, string name, bits<32> simdop> {
defm _#vec : SIMD_I<(outs I32:$dst), (ins V128:$vec), (outs), (ins),
[(set I32:$dst, (i32 (op (vec.vt V128:$vec))))],
vec.prefix#"."#name#"\t$dst, $vec", vec.prefix#"."#name,
simdop>;
}

multiclass SIMDReduce<SDNode op, string name, bits<32> baseInst> {
multiclass SIMDReduce<SDPatternOperator op, string name, bits<32> baseInst> {
defm "" : SIMDReduceVec<I8x16, op, name, baseInst>;
defm "" : SIMDReduceVec<I16x8, op, name, !add(baseInst, 32)>;
defm "" : SIMDReduceVec<I32x4, op, name, !add(baseInst, 64)>;
Expand Down Expand Up @@ -912,23 +913,23 @@ defm SHR_U : SIMDShiftInt<wasm_shr_u, "shr_u", 109>;
// Integer binary arithmetic
//===----------------------------------------------------------------------===//

multiclass SIMDBinaryIntNoI8x16<SDNode node, string name, bits<32> baseInst> {
multiclass SIMDBinaryIntNoI8x16<SDPatternOperator node, string name, bits<32> baseInst> {
defm "" : SIMDBinary<I16x8, node, name, !add(baseInst, 32)>;
defm "" : SIMDBinary<I32x4, node, name, !add(baseInst, 64)>;
defm "" : SIMDBinary<I64x2, node, name, !add(baseInst, 96)>;
}

multiclass SIMDBinaryIntSmall<SDNode node, string name, bits<32> baseInst> {
multiclass SIMDBinaryIntSmall<SDPatternOperator node, string name, bits<32> baseInst> {
defm "" : SIMDBinary<I8x16, node, name, baseInst>;
defm "" : SIMDBinary<I16x8, node, name, !add(baseInst, 32)>;
}

multiclass SIMDBinaryIntNoI64x2<SDNode node, string name, bits<32> baseInst> {
multiclass SIMDBinaryIntNoI64x2<SDPatternOperator node, string name, bits<32> baseInst> {
defm "" : SIMDBinaryIntSmall<node, name, baseInst>;
defm "" : SIMDBinary<I32x4, node, name, !add(baseInst, 64)>;
}

multiclass SIMDBinaryInt<SDNode node, string name, bits<32> baseInst> {
multiclass SIMDBinaryInt<SDPatternOperator node, string name, bits<32> baseInst> {
defm "" : SIMDBinaryIntNoI64x2<node, name, baseInst>;
defm "" : SIMDBinary<I64x2, node, name, !add(baseInst, 96)>;
}
Expand Down Expand Up @@ -986,7 +987,7 @@ defm DOT : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs), (outs), (ins),
186>;

// Extending multiplication: extmul_{low,high}_P, extmul_high
multiclass SIMDExtBinary<Vec vec, SDNode node, string name, bits<32> simdop> {
multiclass SIMDExtBinary<Vec vec, Intrinsic node, string name, bits<32> simdop> {
defm _#vec : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs),
(outs), (ins),
[(set (vec.vt V128:$dst), (node
Expand Down Expand Up @@ -1054,7 +1055,7 @@ defm NEAREST: SIMDUnary<F64x2, int_wasm_nearest, "nearest", 223>;
// Floating-point binary arithmetic
//===----------------------------------------------------------------------===//

multiclass SIMDBinaryFP<SDNode node, string name, bits<32> baseInst> {
multiclass SIMDBinaryFP<SDPatternOperator node, string name, bits<32> baseInst> {
defm "" : SIMDBinary<F32x4, node, name, baseInst>;
defm "" : SIMDBinary<F64x2, node, name, !add(baseInst, 12)>;
}
Expand Down Expand Up @@ -1089,7 +1090,7 @@ defm PMAX : SIMDBinaryFP<int_wasm_pmax, "pmax", 235>;
// Conversions
//===----------------------------------------------------------------------===//

multiclass SIMDConvert<Vec vec, Vec arg, SDNode op, string name,
multiclass SIMDConvert<Vec vec, Vec arg, SDPatternOperator op, string name,
bits<32> simdop> {
defm op#_#vec :
SIMD_I<(outs V128:$dst), (ins V128:$vec), (outs), (ins),
Expand Down Expand Up @@ -1345,7 +1346,7 @@ defm PREFETCH_NT_A64 :
"prefetch.nt\t$off$p2align", 0xc6>;
} // mayLoad, UseNamedOperandTable

multiclass PrefetchPatNoOffset<PatFrag kind, string inst> {
multiclass PrefetchPatNoOffset<Intrinsic kind, string inst> {
def : Pat<(kind I32:$addr), (!cast<NI>(inst # "_A32") 0, 0, $addr)>,
Requires<[HasAddr32]>;
def : Pat<(kind I64:$addr), (!cast<NI>(inst # "_A64") 0, 0, $addr)>,
Expand Down

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