AArch64 backend incorrectly selecting uabdl

[regehr]

this function:

define <8 x i16> @f(<8 x i8> %0, <8 x i8> %1, <8 x i16> %2) {
  %4 = zext <8 x i8> %0 to <8 x i16>
  %5 = ashr <8 x i16> %2, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
  %6 = zext <8 x i8> %1 to <8 x i16>
  %7 = sub <8 x i16> %4, %6
  %8 = add <8 x i16> %5, %7
  %9 = xor <8 x i16> %5, %8
  ret <8 x i16> %9
}

is getting lowered by the AArch64 backend to:

_f: 
	uabdl.8h	v0, v0, v1
	ret

but I don't think that's right. if we call f() like this:

  %x = call <8 x i16> @f(<8 x i8>  <i8 0,  i8 0,  i8 0,  i8 0,  i8 0,  i8 0,  i8 0,  i8 0>,
                         <8 x i8>  <i8 0,  i8 13, i8 0,  i8 0,  i8 0,  i8 0,  i8 0,  i8 0>,
                         <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0,i16 0>)

then we should end up with -13 in lane 1. however, the uabdl puts 13 into that lane.

[llvmbot]

@llvm/issue-subscribers-backend-aarch64

Author: John Regehr (regehr)

this function: ```llvm define <8 x i16> @f(<8 x i8> %0, <8 x i8> %1, <8 x i16> %2) { %4 = zext <8 x i8> %0 to <8 x i16> %5 = ashr <8 x i16> %2, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15> %6 = zext <8 x i8> %1 to <8 x i16> %7 = sub <8 x i16> %4, %6 %8 = add <8 x i16> %5, %7 %9 = xor <8 x i16> %5, %8 ret <8 x i16> %9 } ``` is getting lowered by the AArch64 backend to: ``` _f: uabdl.8h v0, v0, v1 ret ``` but I don't think that's right. if we call f() like this: ```llvm %x = call <8 x i16> @f(<8 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <8 x i8> <i8 0, i8 13, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <8 x i16> <i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0,i16 0>) ``` then we should end up with -13 in lane 1. however, the uabdl puts 13 into that lane.

[davemgreen]

It looks like there are some very old patterns that were not validating where the inputs were coming from. I have removed them in #89272. Thanks for the report.