[RISCV] Add test coverage for commutable RVV instructions #89889
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Created using spr 1.3.6-beta.1
wangpc-pp
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lukel97
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Apr 24, 2024
wangpc-pp
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This patch adds test coverage for commutable RVV instructions
added in #88379.
For each kind of instruction, I add two tests (one for unmasked and
one for masked). These tests don't cover all the SEWs/LMULs as I
think it's not worthy because there is no difference when handling
instructions with different SEWs/LMULs.
As the tests shown, we can't eliminate two equal instructions if
there is a use of
V0. This may be fixed in the future.