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e200_opensource
e200_opensource PublicForked from SI-RISCV/e200_opensource
The Ultra-Low Power RISC Core
Verilog
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ucore_os_lab
ucore_os_lab PublicForked from chyyuu/os_kernel_lab
os kernel labs for operating systems course in Tsinghua University.
C
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os_tutorial_lab
os_tutorial_lab PublicForked from chyyuu/os_tutorial_lab
tutorial labs for os course
C
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NVSim
NVSim PublicForked from SEAL-UCSB/NVSim
NVSim - A performance, energy and area estimation tool for non-volatile memory (NVM)
C++
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NVmain
NVmain PublicForked from SEAL-UCSB/NVmain
NVMain - An Architectural Level Main Memory Simulator for Emerging Non-Volatile Memories
C++
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picorv32
picorv32 PublicForked from YosysHQ/picorv32
PicoRV32 - A Size-Optimized RISC-V CPU
Verilog
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