Skip to content
@lowRISC

lowRISC

Collaborative engineering for open source silicon

Pinned

  1. OpenTitan: Open source silicon root of trust

    SystemVerilog 1.1k 316

  2. ibex Public

    Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

    SystemVerilog 580 253

  3. The root repo for lowRISC project and FPGA demos.

    SystemVerilog 511 129

Repositories

Top languages

Loading…

Most used topics

Loading…