[fpga] Generalize gen_vivado_mem_image.py

[dmcardle]

After merging #15163, we should try to remove OTP- and ROM-specific behavior from gen_vivado_mem_image.py.

• Reorganize files.
  • Move gen_vivado_mem_image.py, gen_vivado_mem_image_test.py to //hw/bitstream/vivado/util.
  • Move mem.py, which generally deals with MEM files to //util, for lack of a better location.
• Add flags that enable us to describe both OTP and ROM behavior.
  • Drop the --swap-nibbles flag.
  • Add --word-width-bits WIDTH: The width of the architecture, not the width baked into the filename.
  • Add --word-transform=(reverse_bits|reverse_nibbles): The word→word function to apply to each input word.
  • Add --zero-padding-words ZERO_PADDING_WORDS: The number of zero words to insert after each word.
• Ensure that the UpdatememSimulator class works for non-OTP sized things.
• Figure out how to generalize parse_otp_init_strings(). Currently, it's not based on theory, but by observing what Vivado does with the OTP vmem during a full build. I wrote it by comparing the input vmem with the output INIT_XX lines (otp_init_strings.txt). I might be able to generalize it to RAMB18 and then write a separate version for RAMB36 (for ROM). Alternatively, we could punt and add an --enable-otp-self-check flag.

[msfschaffner]

Related issue that needs to be addressed long-term: https://github.com/lowRISC/opentitan-integrated/issues/288

CC @a-will @dbeitel-opentitan @andreaskurth